MPC8343VRAGDB Freescale Semiconductor, MPC8343VRAGDB Datasheet - Page 39

• Manufacturer Part Number: MPC8343VRAGDB
• Description: IC MPU POWERQUICC II 620-PBGA
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC II PROr

Specifications of MPC8343VRAGDB

• Processor Type: MPC83xx PowerQUICC II Pro 32-Bit
• Speed: 400MHz
• Voltage: 1.2V
• Mounting Type: Surface Mount
• Package / Case: 620-PBGA
• Processor Series: MPC8xxx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: MPC8349E-MITXE
• Maximum Clock Frequency: 400 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• I/o Voltage: 1.8 V, 2.5 V, 3.3 V
• Minimum Operating Temperature: 0 C
• Core Size: 32 Bit
• Program Memory Size: 64KB
• Cpu Speed: 400MHz
• Embedded Interface Type: I2C, SPI, USB, UART
• Digital Ic Case Style: BGA
• No. Of Pins: 620
• Rohs Compliant: Yes
• Family Name: MPC83xx
• Device Core: PowerQUICC II Pro
• Device Core Size: 32b
• Frequency (max): 400MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.2V
• Operating Supply Voltage (max): 1.26V
• Operating Supply Voltage (min): 1.14V
• Operating Temp Range: 0C to 105C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 620
• Package Type: BGA
• For Use With: CWH-PPC-8343N-VX - KIT EVAL SYSTEM QUICCSTART 8248CWH-PPC-8343N-VE - EVALUATION SYSTEM QUICC MPC8343E
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Figure 25
Figure 26
Freescale Semiconductor
provides the boundary-scan timing diagram.
provides the test access port timing diagram.
External Clock
External Clock
MPC8343EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 10
Data Outputs
Data Outputs
Data Inputs
TDI, TMS
Boundary
Boundary
Boundary
JTAG
JTAG
TDO
TDO
t
t
Output Data Valid
JTKLOX
Output Data Valid
JTKLDX
Figure 26. Test Access Port Timing Diagram
Figure 25. Boundary-Scan Timing Diagram
t
VM = Midpoint Voltage (OV DD /2)
VM = Midpoint Voltage (OV DD /2)
VM
t
VM
JTKLOZ
JTKLDZ
t
t
JTKLOV
JTKLDV
t
t
JTDVKH
JTIVKH
Output Data Valid
Output Data Valid
Data Valid
Data Valid
Input
Input
VM
VM
t
t
JTIXKH
JTDXKH
JTAG
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