XPC8240RZU250E Freescale Semiconductor, XPC8240RZU250E Datasheet - Page 19

MCU HOST PROCESSOR 352-TBGA

XPC8240RZU250E

Manufacturer Part Number
XPC8240RZU250E
Description
MCU HOST PROCESSOR 352-TBGA
Manufacturer
Freescale Semiconductor
Series
PowerQUICC IIr
Datasheets

Specifications of XPC8240RZU250E

Processor Type
MPC82xx PowerQUICC II 32-bit
Speed
200MHz
Voltage
2.5V
Mounting Type
Surface Mount
Package / Case
352-TBGA
Core Size
32 Bit
Program Memory Size
32KB
Cpu Speed
250MHz
Embedded Interface Type
I2C
Digital Ic Case Style
TBGA
No. Of Pins
352
Supply Voltage Range
2.5V To 2.75V
Rohs Compliant
No
Family Name
MPC82XX
Device Core Size
32b
Frequency (max)
250MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
2.625/2.6255V
Operating Supply Voltage (max)
2.75625/2.756775V
Operating Supply Voltage (min)
2.49375/2.494225V
Operating Temp Range
0C to 105C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
352
Package Type
TBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Lead Free Status / Rohs Status
Not Compliant

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Figure 12 shows the PCI_HOLD_DEL effect on output valid and hold time.
1.4.2.5
Table 11 provides the I
MPC8240 Integrated Processor Hardware Specifications
At recommended operating conditions (see Table 2) with LV
Num
1
2
3
PCI_SYNC_IN
12a, 8 ns for 33 MHz PCI
Note: Diagram not to scale.
12a, 6 ns for 66 MHz PCI
Start condition hold time
Clock low period (the time before the MPC8240
will drive SCL low as a transmitting slave after
detecting SCL low as driven by an external
master)
SCL/SDA rise time (from 0.5 to 2.4 V)
PCI_HOLD_DEL = 110
PCI_HOLD_DEL = 100
PCI Inputs/Outputs
PCI Inputs/Outputs
I
2
and Outputs
66 MHz PCI
33 MHz PCI
C AC Timing Specifications
PCI Inputs
Figure 12. PCI_HOLD_DEL Effect on Output Valid and Hold Time
Characteristic
2
C input AC timing specifications for the MPC8240.
Freescale Semiconductor, Inc.
Table 11. I
For More Information On This Product,
OV
Go to: www.freescale.com
DD
2
C Input AC Timing Specifications
÷ 2
Output Valid
DD
= 3.3 V ± 0.3 V
13a, 1 ns for 66-MHz PCI
4({FDR[5],FDR[1]} == b'10) –
2({FDR[5],FDR[1]} == b'00) –
13a, 2 ns for 33-MHz PCI
3({FDR[5],FDR[1]} == b'11)–
1({FDR[5],FDR[1]} == b'01))
8.0 + (16 × 2
PCI_HOLD_DEL = 100
PCI_HOLD_DEL = 110
As PCI_HOLD_DEL
Values Decrease
Min
4.0
As PCI_HOLD_DEL
FDR[4:2]
Electrical and Thermal Characteristics
Values Increase
) × (5 –
Output Hold
Max
OV
1
DD
÷ 2
CLKs
CLKs
Unit
ms
1, 2, 4, 5
Notes
1,2
19

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