XPC8240RZU250E Freescale Semiconductor, XPC8240RZU250E Datasheet - Page 23

• Manufacturer Part Number: XPC8240RZU250E
• Description: MCU HOST PROCESSOR 352-TBGA
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC IIr

Specifications of XPC8240RZU250E

• Processor Type: MPC82xx PowerQUICC II 32-bit
• Speed: 200MHz
• Voltage: 2.5V
• Mounting Type: Surface Mount
• Package / Case: 352-TBGA
• Core Size: 32 Bit
• Program Memory Size: 32KB
• Cpu Speed: 250MHz
• Embedded Interface Type: I2C
• Digital Ic Case Style: TBGA
• No. Of Pins: 352
• Supply Voltage Range: 2.5V To 2.75V
• Rohs Compliant: No
• Family Name: MPC82XX
• Device Core Size: 32b
• Frequency (max): 250MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 2.625/2.6255V
• Operating Supply Voltage (max): 2.75625/2.756775V
• Operating Supply Voltage (min): 2.49375/2.494225V
• Operating Temp Range: 0C to 105C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 352
• Package Type: TBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: Not Compliant

1.4.2.6
Table 14 provides the PIC serial interrupt mode AC timing specifications for the MPC8240.
MPC8240 Integrated Processor Hardware Specifications
At recommended operating conditions (see Table 2) with LV
Num
1
2
3
4
5
6
SCL/SDA
SCL/SDA
Note:
1. The delay is the local memory clock times DFFSR times 2 plus 1 local memory clock.
S_CLK frequency
S_CLK duty cycle
S_CLK output valid time
Output hold time
S_FRAME, S_RST output valid
time
S_INT input setup time to S_CLK
DFFSR FILTER CLK
Note:
1. DFFSR filter clock is the SDRAM_CLK clock times DFFSR value.
qualified
realtime
PIC Serial Interrupt Mode AC Timing Specifications
Characteristic
Table 14. PIC Serial Interrupt Mode AC Timing Specifications
SDA
VM
Figure 16. I
1
Freescale Semiconductor, Inc.
VM
Delay
For More Information On This Product,
Figure 15. I
1
2
C Timing Diagram IV (Qualified Signal)
Go to: www.freescale.com
1 sys_logic_clk period + 2
1/14 SDRAM_SYNC_IN
2
DD
C Timing Diagram III
Min
= 3.3 V ± 0.3 V
40
—
—
0
Electrical and Thermal Characteristics
1 sys_logic_clk period + 6
1/2 SDRAM_SYNC_IN
7
Input Data Valid
Max
60
—
—
6
MHz
Unit
ns
ns
ns
ns
%
Notes
1
2
2
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