XPC8240RZU250E Freescale Semiconductor, XPC8240RZU250E Datasheet - Page 47

• Manufacturer Part Number: XPC8240RZU250E
• Description: MCU HOST PROCESSOR 352-TBGA
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC IIr

Specifications of XPC8240RZU250E

• Processor Type: MPC82xx PowerQUICC II 32-bit
• Speed: 200MHz
• Voltage: 2.5V
• Mounting Type: Surface Mount
• Package / Case: 352-TBGA
• Core Size: 32 Bit
• Program Memory Size: 32KB
• Cpu Speed: 250MHz
• Embedded Interface Type: I2C
• Digital Ic Case Style: TBGA
• No. Of Pins: 352
• Supply Voltage Range: 2.5V To 2.75V
• Rohs Compliant: No
• Family Name: MPC82XX
• Device Core Size: 32b
• Frequency (max): 250MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 2.625/2.6255V
• Operating Supply Voltage (max): 2.75625/2.756775V
• Operating Supply Voltage (min): 2.49375/2.494225V
• Operating Temp Range: 0C to 105C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 352
• Package Type: TBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: Not Compliant

MPC8240 Integrated Processor Hardware Specifications
Revision
Number
0.5
Removed references to GV
been completed.
Corrected Figure 2 power supply ramp-up time to be before the 100 ms PLL relock time.
Table 3:
Added Note 10 to Table 5.
Changed minimum memory bus frequency of operation from 25 to 33 MHz in Table 6 to coincide with
information shown in PLL_CFG Table 18.
Updated clock specifications in Table 7.
Updated input AC timing specifications in Table 8.
Updated output AC timing specifications in Table 9.
Replaced TBDs in Table 14 for specs 3, 5, and 6.
Table 17 renamed TEST3 (pin AF20) to TRIG_IN and renamed TEST4 (pin AC18) to TRIG_OUT; moved
both pins from Test/Configuration Signals group to Miscellaneous Signals group.
Added external pull-up resistor to LVDD recommendation for INTA signal in Table 17 and Section 1.7.5.
Added Note 19 to Table 17 about AVDD and LAVDD being internally connected; revised Section 1.7.1,
on filtering these pins.
Replaced HID1 column TBDs in Table 18 and deleted Note 1 resulting in renumbering notes throughout
Table 18.
Added Section 1.7.7, about PCI reference voltage.
Added note in Section 1.9, indicating ‘L=Standard Spec.’ part is only available in 200 MHz version of the
device. Changed ‘XPC’ to ‘MPC’ for consistency with other references in the document.
• Deleted input leakage specification @ LV
• Changed minimum ‘Input High Voltage for PCI only’ from 0.5*OVDodaoD to 0.65*OVDD and added
• Changed condition on ‘Input Low Voltage,’ V
• Replaced minimum CV
• Replaced maximum CV
Note 6.
PCI_SYNC_IN.’
Table 19. Document Revision History (continued)
Freescale Semiconductor, Inc.
For More Information On This Product,
IH
IL
DD
formula, 0.5*OVDD, with 2.4-V value.
formula, 0.3*OVDD, with 0.4-V value.
Go to: www.freescale.com
= 2.5 V until characterization of the memory interface at this voltage has
Substantive Change(s)
DD
= 5.5 V.
IL
, from ‘All inputs except OSC_IN’ to ‘All inputs except
Document Revision History
47