XPC8240RZU250E Freescale Semiconductor, XPC8240RZU250E Datasheet - Page 2

MCU HOST PROCESSOR 352-TBGA

XPC8240RZU250E

Manufacturer Part Number
XPC8240RZU250E
Description
MCU HOST PROCESSOR 352-TBGA
Manufacturer
Freescale Semiconductor
Series
PowerQUICC IIr
Datasheets

Specifications of XPC8240RZU250E

Processor Type
MPC82xx PowerQUICC II 32-bit
Speed
200MHz
Voltage
2.5V
Mounting Type
Surface Mount
Package / Case
352-TBGA
Core Size
32 Bit
Program Memory Size
32KB
Cpu Speed
250MHz
Embedded Interface Type
I2C
Digital Ic Case Style
TBGA
No. Of Pins
352
Supply Voltage Range
2.5V To 2.75V
Rohs Compliant
No
Family Name
MPC82XX
Device Core Size
32b
Frequency (max)
250MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
2.625/2.6255V
Operating Supply Voltage (max)
2.75625/2.756775V
Operating Supply Voltage (min)
2.49375/2.494225V
Operating Temp Range
0C to 105C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
352
Package Type
TBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Lead Free Status / Rohs Status
Not Compliant

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Overview
Overview
The peripheral logic integrates a PCI bridge, memory controller, DMA controller, PIC interrupt controller,
I
floating-point support, memory management, a 16-Kbyte instruction cache, a 16-Kbyte data cache, and
2
2
O controller, and an I
Additional Features:
• Prog I/O with Watchpoint
• JTAG/COP Interface
• Power Management
MPC8240
Interrupts
16 Serial
5 IRQs/
I
2
C
2
MPC8240 Integrated Processor Hardware Specifications
C controller. The MPC603e core is a full-featured, high-performance processor with
Freescale Semiconductor, Inc.
Controller/
Peripheral Logic Block
Controller
(with I
Message
Controller
Interrupt
Processor Core Block
Timers
DMA
For More Information On This Product,
Processor
Unit
PIC
I
Register
2
System
(SRU)
C
PLL
Unit
2
O)
Figure 1. MPC8240 Block Diagram
Go to: www.freescale.com
PCI Interface
Address
(32-Bit)
32-Bit
Translator
Address
Interface Unit
Central
Control
Integer
Unit
Processing
PCI Bus
Branch
Unit
(IU)
(BPU)
Unit
Request/Grant
Data (64-Bit)
Arbiter
Peripheral Logic Bus
Configuration
PCI
Pairs
Registers
Five
Instruction Unit
(64-Bit) Two-Instruction Dispatch
Load/Store
16-Kbyte
Cache
(LSU)
MMU
Data
Data
Unit
Peripheral Logic
ECC Controller
Data Path
Controller
(64-Bit) Two-Instruction Fetch
Memory
PLL
Buffers
OSC In
Fanout
DLL
64-Bit
Floating-
(FPU)
Point
Unit
Data Bus
(32- or 64-Bit)
with 8-Bit Parity
or ECC
Address/Control
DRAM/SDRAM/
ROM/Flash/Port X
SDRAM Sync In
SDRAM Sync Out
SDRAM Clocks
PCI Clock In
PCI Bus Clocks
Instruction
Instruction
16-Kbyte
Cache
MMU

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