MPC8544VTALF Freescale Semiconductor, MPC8544VTALF Datasheet - Page 32

• Manufacturer Part Number: MPC8544VTALF
• Description: MPU POWERQUICC III 783-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8544VTALF

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 667MHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 783-FCPBGA
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 1.8 V, 3.3 V
• Interface Type: I2C, HSSI, DUART
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Enhanced Three-Speed Ethernet (eTSEC), MII Management
8.5.2
This section describes the GMII transmit and receive AC timing specifications.
8.5.2.1
Table 30
Figure 13
32
At recommended operating conditions with L/TVDD of 3.3 V ± 5% or 2.5 V ± 5%
GTX_CLK clock period
GTX_CLK to GMII data TXD[7:0], TX_ER, TX_EN delay
GTX_CLK data clock rise time (20%-80%)
GTX_CLK data clock fall time (80%-20%)
Notes:
1. The symbols used for timing specifications follow the pattern t
2. Data valid t
and t
(GT) with respect to the t
the valid state (V) to state or setup time. Also, t
reference (K) going to the high state (H) relative to the time date input signals (D) going invalid (X) or hold time. Note that, in
general, the clock reference symbol representation is based on three letters representing the clock of a particular functional.
For example, the subscript of t
is used with the appropriate letter: R (rise) or F (fall).
delay).
(first two letters of functional block)(reference)(state)(signal)(state)
provides the GMII transmit AC timing specifications.
shows the GMII transmit AC timing diagram.
GTKHDV
GMII AC Timing Specifications
GMII Transmit AC Timing Specifications
Parameter/Condition
GTX_CLK
MPC8544E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 5
TXD[7:0]
TX_EN
TX_ER
to GTX_CLK Min setup time is a function of clock period and max hold time (Min setup = cycle time – Max
GTX
clock reference (K) going to the high state (H) relative to the time date input signals (D) reaching
GTX
Table 30. GMII Transmit AC Timing Specifications
Figure 13. GMII Transmit AC Timing Diagram
represents the GMII(G) transmit (TX) clock. For rise and fall times, the latter convention
t
t
GTXH
GTKHDV
t
GTX
GTKHDX
symbolizes GMII transmit timing (GT) with respect to the t
Symbol
for outputs. For example, t
t
GTKHDX
t
t
t
GTXR
GTXF
GTX
(first two letters of functional block)(signal)(state)(reference)(state)
t
GTXF
1
t
GTKHDX
Min
0.2
—
—
—
t
GTXR
GTKHDV
Typ
8.0
—
—
—
symbolizes GMII transmit timing
Max
5.0
1.0
1.0
—
Freescale Semiconductor
Unit
ns
ns
ns
ns
GTX
for inputs
Notes
—
—
—
clock
2