MPC8544VTALF Freescale Semiconductor, MPC8544VTALF Datasheet - Page 63
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MPC8544VTALF
Manufacturer Part Number
MPC8544VTALF
Description
MPU POWERQUICC III 783-PBGA
Manufacturer
Freescale Semiconductor
Datasheets
1.MPC8544VTALF.pdf
(117 pages)
2.MPC8544VTALF.pdf
(2 pages)
3.MPC8544VTALF.pdf
(1340 pages)
Specifications of MPC8544VTALF
Processor Type
MPC85xx PowerQUICC III 32-Bit
Speed
667MHz
Voltage
1V
Mounting Type
Surface Mount
Package / Case
783-FCPBGA
Processor Series
MPC85xx
Core
e500
Data Bus Width
32 bit
Maximum Clock Frequency
667 MHz
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Data Ram Size
32 KB
I/o Voltage
1.8 V, 3.3 V
Interface Type
I2C, HSSI, DUART
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MPC8544VTALF
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Company:
Part Number:
MPC8544VTALFA
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Figure 42
Figure 43
16 High-Speed Serial Interfaces (HSSI)
The MPC8544E features two serializer/deserializer (SerDes) interfaces to be used for high-speed serial
interconnect applications.The SerDes1 dedicated for PCI Express data transfers. The SerDes2 can be used
for PCI Express and/or SGMII application. This section describes the common portion of SerDes DC
electrical specifications, which is the DC requirement for SerDes Reference Clocks. The SerDes data
lane’s transmitter and receiver reference circuits are also shown.
16.1
The SerDes utilizes differential signaling to transfer data across the serial link. This section defines terms
used in the description and specification of differential signals.
Figure 44
description. The figure shows waveform for either a transmitter output (SDn_TX and SDn_TX) or a
receiver input (SDn_RX and SDn_RX). Each signal swings between A Volts and B Volts where A > B.
Freescale Semiconductor
Signal Terms Definition
shows the PCI input AC timing conditions.
shows the PCI output AC timing conditions.
shows how the signals are defined. For illustration purpose, only one SerDes lane is used for
MPC8544E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 5
High-Impedance
Figure 43. PCI Output AC Timing Measurement Condition
Figure 42. PCI Input AC Timing Measurement Conditions
Output Delay
Input
CLK
Output
CLK
t
PCIVKH
t
PCKHOZ
t
PCKHOV
t
PCIXKH
High-Speed Serial Interfaces (HSSI)
63