Z0840004PSC Zilog, Z0840004PSC Datasheet - Page 34

• Manufacturer Part Number: Z0840004PSC
• Description: IC 4MHZ Z80 NMOS CPU 40-DIP
• Manufacturer: Zilog

Specifications of Z0840004PSC

• Processor Type: Z80
• Features: NMOS
• Speed: 4MHz
• Voltage: 5V
• Mounting Type: Through Hole
• Package / Case: 40-DIP (0.620", 15.75mm)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

ZiLOG
The acceleration obtained when using high temperature life stressing may be calculated for various stress
and application temperatures using the widely accepted Arrhenius equation as follows:
Where
Assume Ea = .7, Ta application = 55C, Ta stress = 125˚C and k = 8.62 x 10
CMOS product Z85230 operating with a 100% duty cycle at 16 MHz in a 44 pin PLCC package. Then with a
VCC of 5V and an Icc of 7 ma this would give T1 = 330˚K and T2 = 400˚K.
So 1000 hours of life stress at 125˚C is equivalent to 75,000 hours of system application operation at 55˚C.
FIT and Failure Rate Estimation:
Given High Temperature Operating Life stress results:
Z85230
Rel Monitor 1994
Rel Monitor 1995
Rel Monitor 1996
Rel Monitor 1997
Rel Monitor 1998
Rel Monitor 1999
Rel Monitor 2000
Rel Monitor 2001
Rel Monitor 1H-2002
Failure Rate Estimations are made assuming a Poisson distribution using the Chi
confidence values as an estimate for the general population as follows:
Given 1 reject from 29,527,680 device hours at 125˚C. Then using Chi
4.05/2 rejects per 29,527,680 device hours or 0.0686 rejects per 10
Failure rate
Failure Rate
MTBF
ZAC03-0004
= 0.0686 rej / 10
= 68.6 rej / 10
= 68.6 FIT at 125 C
= 68.6/75 = 1 FIT at 55˚C (A = 75 as above)
= 10
9
/1 = 124,471 years
A:
Ea:
T1:
T2:
k:
168 Hours
0/76
0/837
0/10,759
1/6,152
0/7,520
0/22,470
0/38,258
0/61,646
0/12,992
0/8,394
A = exp (-.7(330 - 400) / 8.62 x 10
60% Confidence
9
Z85230VSC FIT Rate Calculation
dev. hrs.
Acceleration factor
Activation energy (eV)
Application junction temperature (˚K)
Stress junction temperature (˚K)
Boltzmann Constant 8.62 x 10-5 (eV / ˚K)
6
dev. hrs.
A = exp (-Ea (T1 - T2) / (k (T1) (T2)))
500 Hours
0/76
0/760
077
0/231
0/200
# Fails = 1 then Chi
5
(330) (400) ) = 75
6
device hours.
2
this gives a median failure rate of
2
1000 Hours
0/76
0/606
0/77
0/231
0/200
= 4.05
2002 Quality and Reliability Report
5
. Consider now a typical
2
density function to assign
4 - 3