MC68EC020FG25 Freescale Semiconductor, MC68EC020FG25 Datasheet - Page 130

IC MPU 32 BIT 25MHZ 100-QFP

MC68EC020FG25

Manufacturer Part Number
MC68EC020FG25
Description
IC MPU 32 BIT 25MHZ 100-QFP
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68EC020FG25

Processor Type
M680x0 32-Bit
Speed
25MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
100-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-

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The processor begins exception processing for a bus error by making an internal copy of
the current SR. The processor then enters the supervisor privilege level (by setting the S-
bit in the SR) and clears the T1 and T0 bits in the SR. The processor generates exception
vector number 2 for the bus error vector. It saves the vector offset, PC, and the internal
copy of the SR on the active supervisor stack. The saved PC value is the logical address
of the instruction that was executing at the time the fault was detected. This is not
necessarily the instruction that initiated the bus cycle since the processor overlaps
MOTOROLA
Figure 6-1. Reset Operation Flowchart
M68020 USER’S MANUAL
T1, T0 (SR)
I2–I0 (SR)
ENTRIES INVALIDATED
INSTRUCTION CACHE
PREFETCH 3 WORDS
BEGIN INSTRUCTION
FETCH VECTOR #0
FETCH VECTOR #1
M (SR)
SP (VECTOR #0)
PC (VECTOR #1)
S (SR)
CACR
VBR
OTHERWISE
OTHERWISE
OTHERWISE
EXECUTION
ENTRY
EXIT
1
0
0
$7
$00000000
$00000000
ADDRESS ERROR
BUS ERROR
BUS ERROR OR
BUS ERROR
EXIT
EXIT
EXIT
(DOUBLE BUS FAULT)
(DOUBLE BUS FAULT)
(DOUBLE BUS FAULT)
6- 5

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