MC68EC020FG25 Freescale Semiconductor, MC68EC020FG25 Datasheet - Page 205

• Manufacturer Part Number: MC68EC020FG25
• Description: IC MPU 32 BIT 25MHZ 100-QFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68EC020FG25

• Processor Type: M680x0 32-Bit
• Speed: 25MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -

7.5.1.2 COPROCESSOR-DETECTED ILLEGAL COMMAND OR CONDITION WORDS.
Illegal coprocessor command or condition words are values written to the command CIR
or condition CIR that the coprocessor does not recognize. If a value written to either of
these registers is not valid, the coprocessor should return the take preinstruction
exception primitive in the response CIR. When it receives this primitive, the main
processor takes a preinstruction exception as described in 7.4.18 Take Preinstruction
Exception Primitive. If the exception handler does not modify the main processor stack
frame, an RTE instruction causes the MC68020/EC020 to reinitiate the instruction that
took the exception. The coprocessor designer should ensure that the state of the
coprocessor is not irrecoverably altered by an illegal command or condition exception if
the system supports emulation of the unrecognized command or condition word.
All M68000 coprocessors signal illegal command and condition words by returning the
take preinstruction exception primitive with the F-line emulator exception vector number
11.
7.5.1.3 COPROCESSOR DATA-PROCESSING-RELATED EXCEPTIONS. Exceptions
related to the internal operation of a coprocessor are classified as data-processing-related
exceptions. These exceptions are analogous to the divide-by-zero exception defined by
M68000 microprocessors and should be signaled to the main processor using one of the
three take exception primitives containing an appropriate exception vector number. Which
of these three primitives is used to signal the exception is usually determined by the point
in the instruction operation where the main processor should continue the program flow
after exception processing. Refer to 7.4.18 Take Preinstruction Exception Primitives,
7.4.19 Take Midinstruction Exception Primitive, and 7.4.20 Take Postinstruction
Exception Primitive.
7.5.1.4 COPROCESSOR SYSTEM-RELATED EXCEPTIONS. System-related exceptions
detected by a DMA coprocessor include those associated with bus activity and any other
exceptions (interrupts, for example) occurring external to the coprocessor. The actions
taken by the coprocessor and the main processor depend on the type of exception that
occurs.
When an address or bus error is detected by a DMA coprocessor, the coprocessor should
store any information necessary for the main processor exception handling routines in
system-accessible registers. The coprocessor should place one of the three take
exception primitives encoded with an appropriate exception vector number in the
response CIR. Which of the three primitives is used depends upon the point in the
coprocessor instruction at which the exception was detected and the point in the
instruction execution at which the main processor should continue after exception
processing. Refer to 7.4.18 Take Preinstruction Exception Primitives, 7.4.19 Take
Midinstruction Exception Primitive, and 7.4.20 Take Postinstruction Exception
Primitive.
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M68020 USER’S MANUAL
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