MC68EC020FG25 Freescale Semiconductor, MC68EC020FG25 Datasheet - Page 206

• Manufacturer Part Number: MC68EC020FG25
• Description: IC MPU 32 BIT 25MHZ 100-QFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68EC020FG25

• Processor Type: M680x0 32-Bit
• Speed: 25MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -

7.5.1.5 FORMAT ERRORS. Format errors are the only coprocessor-detected exceptions
that are not signaled to the main processor with a response primitive. When the main
processor writes a format word to the restore CIR during the execution of a cpRESTORE
instruction, the coprocessor decodes this word to determine if it is valid (refer to 7.2.3.3
Coprocessor Context Save Instruction). If the format word is not valid, the coprocessor
places the invalid format code in the restore CIR. When the main processor reads the
invalid format code, it aborts the coprocessor instruction by writing an abort mask to the
control CIR (refer to 7.3.2 Control CIR). The main processor then performs exception
processing using a four-word preinstruction stack frame and the format error exception
vector number 14. Thus, if the exception handler does not modify the stack frame, the
MC68020/EC020 restarts the cpRESTORE instruction when the RTE instruction in the
handler is executed. If the coprocessor returns the invalid format code when the main
processor reads the save CIR to initiate a cpSAVE instruction, the main processor
performs format error exception processing as outlined for the cpRESTORE instruction.
7.5.2 Main-Processor-Detected Exceptions
A number of exceptions related to coprocessor instruction execution are detected and
serviced by the main processor instead of the coprocessor. These exceptions can be
related to the execution of coprocessor response primitives, communication across the
M68000 coprocessor interface, or completion of conditional coprocessor instructions by
the main processor.
7.5.2.1 PROTOCOL VIOLATIONS. The main processor detects a protocol violation when
it reads a primitive from the response CIR that is not a valid primitive. The protocol
violations that can occur in response to the primitives defined for the M68000 coprocessor
interface are summarized in Table 7-6.
MOTOROLA
M68020 USER’S MANUAL
7- 53