DSPIC30F2020-30I/SP Microchip Technology Inc., DSPIC30F2020-30I/SP Datasheet - Page 176
DSPIC30F2020-30I/SP
Manufacturer Part Number
DSPIC30F2020-30I/SP
Description
DSP, 16-Bit, 12KB Flash, 512 RAM, 21 I/O, SDIP-28
Manufacturer
Microchip Technology Inc.
Type
DSPr
Datasheet
1.DSPIC30F2023-30IPT.pdf
(286 pages)
Specifications of DSPIC30F2020-30I/SP
A/d Inputs
8-Channels, 10-Bit
Comparators
4
Cpu Speed
30 MIPS
Eeprom Memory
0 Bytes
Input Output
21
Interface
I2C/SPI/UART
Ios
21
Memory Type
Flash
Number Of Bits
16
Package Type
28-pin SPDIP
Programmable Memory
12K Bytes
Ram Size
512 Bytes
Timers
3-16-bit, 1-32-bit
Voltage, Range
3-5.5
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
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dsPIC30F1010/202X
REGISTER 16-3:
REGISTER 16-4:
DS70178C-page 174
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-1
bit 0
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-12
bit 11-0
Note:
PCFG7
R/W-0
R/W-0
R/W-0
U-0
—
As an alternative to using the ADBASE Register, the ADCP0-5 ADC Pair Conversion Complete Interrupts
(Interrupts 37-42) can be used to invoke A to D conversion completion routines for individual ADC input
pairs. Refer to Section 16.9 “Individual Pair Interrupts”.
ADC Base Register: This register contains the base address of the user’s ADC Interrupt Service Rou-
tine jump table. This register, when read, contains the sum of the ADBASE register contents and the
encoded value of the PxRDY Status bits.
The encoder logic provides the bit number of the highest priority PxRDY bits where P0RDY is the
highest priority, and P5RDY is lowest priority.
Unimplemented: Read as ‘0’
Unimplemented: Read as ‘0’
PCFG<11:0>: A/D Port Configuration Control bits
1 = Port pin in Digital mode, port read input enabled, A/D input multiplexor connected to AV
0 = Port pin in Analog mode, port read input disabled, A/D samples pin voltage
Note:
PCFG6
R/W-0
R/W-0
R/W-0
U-0
—
A/D BASE REGISTER (ADBASE)
A/D PORT CONFIGURATION REGISTER (ADPCFG)
The encoding results are shifted left two bits so bits 1-0 of the result are always zero.
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
PCFG5
R/W-0
R/W-0
R/W-0
U-0
—
ADBASE<7:1>
PCFG4
R/W-0
R/W-0
R/W-0
U-0
Preliminary
ADBASE<15:8>
—
U = Unimplemented bit, read as ‘0’
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
‘0’ = Bit is cleared
PCFG11
PCFG3
R/W-0
R/W-0
R/W-0
R/W-0
PCFG10
PCFG2
R/W-0
R/W-0
R/W-0
R/W-0
© 2006 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
PCFG9
PCFG1
R/W-0
R/W-0
R/W-0
R/W-0
PCFG8
PCFG0
R/W-0
R/W-0
R/W-0
U-0
SS
—
bit 8
bit 0
bit 8
bit 0
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