DSPIC30F2020-30I/SP Microchip Technology Inc., DSPIC30F2020-30I/SP Datasheet - Page 204

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DSPIC30F2020-30I/SP

Manufacturer Part Number
DSPIC30F2020-30I/SP
Description
DSP, 16-Bit, 12KB Flash, 512 RAM, 21 I/O, SDIP-28
Manufacturer
Microchip Technology Inc.
Type
DSPr
Datasheet

Specifications of DSPIC30F2020-30I/SP

A/d Inputs
8-Channels, 10-Bit
Comparators
4
Cpu Speed
30 MIPS
Eeprom Memory
0 Bytes
Input Output
21
Interface
I2C/SPI/UART
Ios
21
Memory Type
Flash
Number Of Bits
16
Package Type
28-pin SPDIP
Programmable Memory
12K Bytes
Ram Size
512 Bytes
Timers
3-16-bit, 1-32-bit
Voltage, Range
3-5.5
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device
dsPIC30F1010/202X
REGISTER 18-3:
REGISTER 18-4:
DS70178C-page 202
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-12
bit 11-8
bit 7-4
bit 3-0
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14-8
bit 7-0
R/W-0
R/W-0
R/W-0
U-0
TSEQ7<3:0>: Tune Sequence value #7 bits
When PWM ROLL<2:0> = 111, this field is used to tune the FRC instead of TUN<3:0>
TSEQ6<3:0>: Tune Sequence value #6 bits
When PWM ROLL<2:0> = 110, this field is used to tune the FRC instead of TUN<3:0>
TSEQ5<3:0>: Tune Sequence value #5 bits
When PWM ROLL<2:0> = 101, this field is used to tune the FRC instead of TUN<3:0>
TSEQ4<3:0>: Tune Sequence value #4 bits
When PWM ROLL<2:0> = 100, this field is used to tune the FRC instead of TUN<3:0>
Unimplemented: Read as ‘0’
When PWM ROLL<2:0> = 111, this field is used to tune the FRC instead of TUN<3:0>
LFSR <14:8>: Most Significant 7 bits of the pseudo random FRC trim value bits
LFSR <7:0>:
R/W-0
R/W-0
R/W-0
R/W-0
OSCTUN2: OSCILLATOR TUNING REGISTER 2
LFSR: LINEAR FEEDBACK SHIFT REGISTER
TSEQ7<3:0>
TSEQ5<3:0>
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
Least Significant 8 bits of the pseudo random FRC trim value bits
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
Preliminary
LFSR<7:0>
U = Unimplemented bit, read as ‘0’
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
‘0’ = Bit is cleared
LFSR<14:8>
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
TSEQ6<3:0>
TSEQ4<3:0>
© 2006 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
bit 8
bit 0
bit 8
bit 0

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