PIC24FJ256DA210-I/PT Microchip Technology Inc., PIC24FJ256DA210-I/PT Datasheet - Page 277

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PIC24FJ256DA210-I/PT

Manufacturer Part Number
PIC24FJ256DA210-I/PT
Description
100 TQFP 12x12x1mm TRAY, 16-bit, 256KB Flash, 96K RAM, USB, Graphics
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC24FJ256DA210-I/PT

A/d Inputs
24 Channel, 10-Bit
Comparators
3
Cpu Speed
16 MIPS
Eeprom Memory
0 Bytes
Input Output
84
Interface
I2C/SPI/UART
Memory Capacity
256 Kbytes
Memory Type
Flash
Number Of Bits
16
Number Of Leads
100
Number Of Pins
100
Package Type
100-Pin TQFP
Programmable Memory
256K Bytes
Ram Size
96K Bytes
Speed
32 MHz
Temperature Range
–40 to +85 °C
Timers
5-16-bit
Voltage, Range
2.2-3.6 V
Voltage, Rating
2.2-3.6 V
Run Mode
800 μA/MIPS, 3.3 V Typical
Standby Current With 32 Khz Oscillator
22 μA, 3.3 V Typical
Lead Free Status / Rohs Status
RoHS Compliant part

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REGISTER 19-3:
 2010 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10-9
bit bit 8
bit 7
bit 6-0
PTWREN
R/W-0
U-0
PTWREN: Write/Enable Strobe Port Enable bit
1 = PMWR/PMENB port is enabled
0 = PMWR/PMENB port is disabled
PTRDEN: Read/Write Strobe Port Enable bit
1 = PMRD/PMWR port is enabled
0 = PMRD/PMWR port is disabled
PTBE1EN: High Nibble/Byte Enable Port Enable bit
1 = PMBE1 port is enabled
0 = PMBE1 port is disabled
PTBE0EN: Low Nibble/Byte Enable Port Enable bit
1 = PMBE0 port is enabled
0 = PMBE0 port is disabled
Unimplemented: Read as ‘0’
AWAITM<1:0>: Address Latch Strobe Wait States bits
11 = Wait of 3½ T
10 = Wait of 2½ T
01 = Wait of 1½ T
00 = Wait of ½ T
AWAITE: Address Hold After Address Latch Strobe Wait States bits
1 = Wait of 1¼ T
0 = Wait of ¼ T
Unimplemented: Read as ‘0’
PTEN<22:16>: EPMP Address Port Enable bits
1 = PMA<22:16> function as EPMP address lines
0 = PMA<22:16> function as port I/Os
PTRDEN
PTEN22
R/W-0
R/W-0
PMCON3: EPMP CONTROL REGISTER 3
W = Writable bit
‘1’ = Bit is set
CY
PTBE1EN
CY
PTEN21
CY
CY
CY
CY
R/W-0
R/W-0
PTBE0EN
PIC24FJ256DA210 FAMILY
PTEN20
R/W-0
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PTEN19
R/W-0
U-0
AWAITM1
PTEN18
R/W-0
R/W-0
x = Bit is unknown
AWAITM0
PTEN17
R/W-0
R/W-0
DS39969B-page 277
AWAITE
PTEN16
R/W-0
R/W-0
bit 8
bit 0

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