PIC24FJ256DA210-I/PT Microchip Technology Inc., PIC24FJ256DA210-I/PT Datasheet - Page 30

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PIC24FJ256DA210-I/PT

Manufacturer Part Number
PIC24FJ256DA210-I/PT
Description
100 TQFP 12x12x1mm TRAY, 16-bit, 256KB Flash, 96K RAM, USB, Graphics
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC24FJ256DA210-I/PT

A/d Inputs
24 Channel, 10-Bit
Comparators
3
Cpu Speed
16 MIPS
Eeprom Memory
0 Bytes
Input Output
84
Interface
I2C/SPI/UART
Memory Capacity
256 Kbytes
Memory Type
Flash
Number Of Bits
16
Number Of Leads
100
Number Of Pins
100
Package Type
100-Pin TQFP
Programmable Memory
256K Bytes
Ram Size
96K Bytes
Speed
32 MHz
Temperature Range
–40 to +85 °C
Timers
5-16-bit
Voltage, Range
2.2-3.6 V
Voltage, Rating
2.2-3.6 V
Run Mode
800 μA/MIPS, 3.3 V Typical
Standby Current With 32 Khz Oscillator
22 μA, 3.3 V Typical
Lead Free Status / Rohs Status
RoHS Compliant part

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PIC24FJ256DA210 FAMILY
TABLE 1-3:
DS39969B-page 30
RP20
RP21
RP22
RP23
RP24
RP25
RP26
RP27
RP28
RP29
RP30
RP31
RPI32
RPI33
RPI34
RPI35
RPI36
RPI37
RPI38
RPI39
RPI40
RPI41
RPI42
RPI43
RTCC
SCL1
SCL2
SCL3
SCLKI
SDA1
SDA2
SDA3
SESSEND
SESSVLD
SOSCI
SOSCO
T1CK
Legend:
Note 1:
Function
2:
3:
4:
TTL = TTL input buffer
ANA = Analog level input/output
The alternate EPMP pins are selected when the ALTPMP (CW3<12>) bit is programmed to ‘0’.
The PMSC2 signal will replace the PMA15 signal on the 15-pin PMA when CSF<1:0> = 01 or 10.
The PMCS1 signal will replace the PMA14 signal on the 14-pin PMA when CSF<1:0> = 10.
The alternate V
TQFP/QFN
64-Pin
50
49
48
42
48
55
59
48
53
51
52
12
30
44
32
43
31
47
48
4
5
8
2
3
PIC24FJ256DA210 FAMILY PINOUT DESCRIPTIONS (CONTINUED)
Pin Number
REF
100-Pin
TQFP
pins selected when the ALTVREF (CW1<5>) bit is programmed to ‘0’.
82
10
78
77
76
81
11
14
21
44
52
39
40
18
19
67
66
74
79
47
68
66
58
74
67
59
84
88
73
74
74
6
7
8
9
4
5
121-Pin
BGA
G10
C10
A10
A11
K11
E11
B11
E11
H11
B11
B11
B11
B8
E3
B9
C8
H2
K6
G1
G2
E8
D1
E4
E2
E1
A9
E9
C1
E8
D2
C7
A6
F4
F3
L8
L6
L9
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
Buffer
Input
I
ANA
ANA
ANA
2
I
I
I
I
I
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
C™
2
2
2
2
2
ST
ST = Schmitt Trigger input buffer
I
2
C
C
C
C
C
C™ = I
Remappable Peripheral (input or output).
Remappable Peripheral (input only).
Real-Time Clock Alarm/Seconds Pulse Output.
I2C1 Synchronous Serial Clock Input/Output.
I2C2 Synchronous Serial Clock Input/Output.
I2C3 Synchronous Serial Clock Input/Output.
Secondary Clock Input.
I2C1 Data Input/Output.
I2C2 Data Input/Output.
I2C3 Data Input/Output.
USB V
USB V
Secondary Oscillator/Timer1 Clock Input.
Secondary Oscillator/Timer1 Clock Output.
Timer1 Clock.
2
C/SMBus input buffer
BUS
BUS
Boost Generator, Comparator Input 3.
Boost Generator, Comparator Input 2.
Description
 2010 Microchip Technology Inc.

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