PIC24FJ256DA210-I/PT Microchip Technology Inc., PIC24FJ256DA210-I/PT Datasheet - Page 332

• Manufacturer Part Number: PIC24FJ256DA210-I/PT
• Description: 100 TQFP 12x12x1mm TRAY, 16-bit, 256KB Flash, 96K RAM, USB, Graphics
• Manufacturer: Microchip Technology Inc.

Specifications of PIC24FJ256DA210-I/PT

• A/d Inputs: 24 Channel, 10-Bit
• Comparators: 3
• Cpu Speed: 16 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 84
• Interface: I2C/SPI/UART
• Memory Capacity: 256 Kbytes
• Memory Type: Flash
• Number Of Bits: 16
• Number Of Leads: 100
• Number Of Pins: 100
• Package Type: 100-Pin TQFP
• Programmable Memory: 256K Bytes
• Ram Size: 96K Bytes
• Speed: 32 MHz
• Temperature Range: –40 to +85 °C
• Timers: 5-16-bit
• Voltage, Range: 2.2-3.6 V
• Voltage, Rating: 2.2-3.6 V
• Run Mode: 800 μA/MIPS, 3.3 V Typical
• Standby Current With 32 Khz Oscillator: 22 μA, 3.3 V Typical
• Lead Free Status / Rohs Status: RoHS Compliant part

PIC24FJ256DA210 FAMILY
REGISTER 23-7:
EQUATION 23-1:
DS39969B-page 332
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-12
bit 11
bit 10
bit 9
bit 8
bit 7-0
Note 1:
CSSL23
R/W-0
U-0
—
(1)
Unimplemented in 64-pin devices, read as ‘0’.
Unimplemented: Read as ‘0’
CSSL27: A/D Input Band Gap Scan Selection bit
1 = Band gap divided-by-six reference (V
0 = Analog channel is omitted from input scan
CSSL26: A/D Input Band Gap Scan Selection bit
1 = Internal core voltage (V
0 = Analog channel is omitted from input scan
CSSL25: A/D Input Half Band Gap Scan Selection bit
1 = Band gap reference (V
0 = Analog channel is omitted from input scan
CSSL24: A/D Input Band Gap Scan Selection bit
1 = Band gap divided-by-two reference (V
0 = Analog channel is omitted from input scan
CSSL<23:16>: Analog Input Pin Scan Selection bits
1 = Corresponding analog channel selected for input scan
0 = Analog channel is omitted from input scan
CSSL22
Note 1:
R/W-0
U-0
—
AD1CSSH: A/D INPUT SCAN SELECT REGISTER (HIGH)
A/D CONVERSION CLOCK PERIOD
(1)
Based on T
W = Writable bit
‘1’ = Bit is set
CSSL21
R/W-0
U-0
—
(1)
CY
BG
= 2 * T
CAP
) is selected for input scan
CSSL20
) is selected for input scan
T
AD
R/W-0
U-0
OSC
ADCS =
—
= T
; Doze mode and PLL are disabled.
CY
(1)
BG
• (ADCS = 1)
BG
T
T
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
/6) is selected for input scan
AD
CY
/2) is selected for input scan
CSSL19
CSSL27
R/W-0
R/W-0
– 1
(1)
(1)
(1)
CSSL18
CSSL26
R/W-0
R/W-0
(1)
 2010 Microchip Technology Inc.
x = Bit is unknown
CSSL17
CSSL25
R/W-0
R/W-0
(1)
CSSL16
CSSL24
R/W-0
R/W-0
bit 8
bit 0
(1)