PIC24FJ256GB206-I/MR Microchip Technology Inc., PIC24FJ256GB206-I/MR Datasheet - Page 381

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PIC24FJ256GB206-I/MR

Manufacturer Part Number
PIC24FJ256GB206-I/MR
Description
16-bit, 256KB Flash, 96K RAM, USB, 64 QFN 9x9x0.9mm TUBE
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC24FJ256GB206-I/MR

A/d Inputs
16 Channel, 10-bit
Comparators
3
Cpu Speed
16 MIPS
Eeprom Memory
0 Bytes
Input Output
52
Interface
I2C/SPI/UART/USART/USB
Memory Type
Flash
Number Of Bits
16
Package Type
64-pin QFN
Programmable Memory
256K Bytes
Ram Size
98K Bytes
Speed
32 MHz
Temperature Range
–40 to 85 °C
Timers
5-16-bit
Voltage, Range
2.2-3.6 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device
Revision History ................................................................ 375
RTCC
S
Selective Peripheral Power Control .................................. 150
Serial Peripheral Interface (SPI) ....................................... 205
Serial Peripheral Interface. See SPI.
SFR Space.......................................................................... 47
Sleep Mode ....................................................................... 149
Software Simulator (MPLAB SIM)..................................... 337
Software Stack .................................................................... 72
Special Features ................................................................. 16
SPI .................................................................................... 205
T
Timer1 ............................................................................... 183
Timer2/3 and Timer4/5...................................................... 185
Timing Diagrams
Triple Comparator ............................................................. 311
Triple Comparator Module ................................................ 311
U
UART ................................................................................ 225
Universal Asynchronous Receiver Transmitter. See UART.
Universal Serial Bus
Universal Serial Bus. See USB OTG.
USB On-The-Go (OTG) ...................................................... 16
 2010 Microchip Technology Inc.
SFR States.................................................................. 88
SWR (RESET Instruction)........................................... 85
TRAPR (Trap Conflict Reset)...................................... 85
UWR (Uninitialized W Register Reset) ....................... 85
WDT (Watchdog Timer Reset).................................... 85
Alarm Configuration .................................................. 290
Calibration................................................................. 290
Key Features............................................................. 281
Register Mapping...................................................... 282
CLKO and I/O Timing................................................ 359
External Clock........................................................... 356
Baud Rate Generator (BRG)..................................... 226
IrDA Support ............................................................. 227
Operation of UxCTS and UxRTS Pins ...................... 227
Receiving in 8-Bit or 9-Bit Data Mode....................... 227
Transmitting
Transmitting in 9-Bit Data Mode ............................... 227
Buffer Descriptors
Interrupts
Break and Sync Sequence ............................... 227
in 8-Bit Data Mode ............................................ 227
Assignment in Different Buffering Modes ......... 240
and USB Transactions ...................................... 244
PIC24FJ256GB210 FAMILY
USB OTG ......................................................................... 233
V
Voltage Regulator (On-Chip) ............................................ 330
W
Watchdog Timer (WDT).................................................... 331
WWW Address ................................................................. 382
WWW, On-Line Support ..................................................... 14
Buffer Descriptors and BDT...................................... 239
Device Mode Operation............................................ 244
DMA Interface........................................................... 240
Hardware
Hardware Configuration............................................ 235
Host Mode Operation ............................................... 245
Interrupts .................................................................. 243
Operation.................................................................. 247
Registers .................................................................. 249
V
and BOR................................................................... 330
Low-Voltage Detection ............................................. 330
Standby Mode .......................................................... 330
Control Register........................................................ 331
Windowed Operation ................................................ 331
BUS
Calculating
Device Mode..................................................... 235
External Interface ............................................. 237
Host and OTG Modes....................................... 236
V
Voltage Generation ......................................... 237
BUS
Transceiver Power Requirements ............ 237
Voltage Generation ................................. 237
DS39975A-page 381

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