PIC16F72-I/SO Microchip Technology Inc., PIC16F72-I/SO Datasheet - Page 103

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PIC16F72-I/SO

Manufacturer Part Number
PIC16F72-I/SO
Description
28 PIN, 3.5 KB FLASH, 128 RAM, 22 I/O
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC16F72-I/SO

A/d Inputs
5-Channel, 8-Bit
Cpu Speed
5 MIPS
Eeprom Memory
0 Bytes
Input Output
22
Interface
I2C/SPI
Memory Type
Flash
Number Of Bits
8
Package Type
28-pin SOIC
Programmable Memory
3.5K Bytes
Ram Size
128 Bytes
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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TABLE 14-6:
FIGURE 14-14:
 2002 Microchip Technology Inc.
Param
No.
SCL
70*
71*
72*
73*
74*
75*
76*
77*
78*
79*
80*
81*
82*
83*
SDA
Note: Refer to Figure 14-3 for load conditions.
*
† Data in "Typ" column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance
TssL2scH,
TssL2scL
TscH
TscL
TdiV2scH,
TdiV2scL
TscH2diL,
TscL2diL
TdoR
TdoF
TssH2doZ
TscR
TscF
TscH2doV,
TscL2doV
TdoV2scH,
TdoV2scL
TssL2doV
TscH2ssH,
TscL2ssH
These parameters are characterized but not tested.
only and are not tested.
Symbol
SPI MODE REQUIREMENTS
90
Condition
SS↓ to SCK↓ or SCK↑ input
SCK input high time (Slave mode)
SCK input low time (Slave mode)
Setup time of SDI data input to SCK edge
Hold time of SDI data input to SCK edge
SDO data output rise time
SDO data output fall time
SS↑ to SDO output hi-impedance
SCK output rise time
(Master mode)
SCK output fall time (Master mode)
SDO data output valid after
SCK edge
SDO data output setup to SCK edge
SDO data output valid after SS↓ edge
SS ↑ after SCK edge
I
2
START
C BUS START/STOP BITS TIMING
91
Characteristic
Standard(F)
Extended(LF)
Standard(F)
Extended(LF)
Standard(F)
Extended(LF)
1.5 T
T
T
CY
CY
Min
T
100
100
T
10
CY
CY
CY
+ 20
+ 20
+ 40
Typ†
92
10
25
10
10
25
10
Condition
STOP
Max Units Conditions
PIC16F72
145
25
50
25
50
25
50
25
50
50
93
DS39597B-page 101
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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