PIC16F72-I/SO Microchip Technology Inc., PIC16F72-I/SO Datasheet - Page 79
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PIC16F72-I/SO
Manufacturer Part Number
PIC16F72-I/SO
Description
28 PIN, 3.5 KB FLASH, 128 RAM, 22 I/O
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC16F72-ISO.pdf
(136 pages)
Specifications of PIC16F72-I/SO
A/d Inputs
5-Channel, 8-Bit
Cpu Speed
5 MIPS
Eeprom Memory
0 Bytes
Input Output
22
Interface
I2C/SPI
Memory Type
Flash
Number Of Bits
8
Package Type
28-pin SOIC
Programmable Memory
3.5K Bytes
Ram Size
128 Bytes
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16F72-I/SO
Manufacturer:
MICROCHIP
Quantity:
3 290
Part Number:
PIC16F72-I/SO
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
COMF
Syntax:
Operands:
Operation:
Status Affected:
Description:
DECF
Syntax:
Operands:
Operation:
Status Affected:
Description:
DECFSZ
Syntax:
Operands:
Operation:
Status Affected:
Description:
2002 Microchip Technology Inc.
Decrement f, Skip if 0
[ label ] DECFSZ f,d
0 ≤ f ≤ 127
d ∈ [0,1]
(f) - 1 → (destination);
skip if result = 0
None
The contents of register ‘f’ are
decremented. If ‘d’ = ‘0’, the result
is placed in the W register. If
‘d’ = ‘1’, the result is placed back
in register ‘f’.
If the result is ‘1’, the next instruc-
tion is executed. If the result is ‘0’,
then a NOP is executed instead,
making it a 2 T
Complement f
[ label ] COMF
0 ≤ f ≤ 127
d ∈ [0,1]
(f) → (destination)
Z
The contents of register ‘f’ are
complemented. If ‘d’ = ‘0’, the
result is stored in W. If ‘d’ = ‘1’, the
result is stored back in register ‘f’.
Decrement f
[ label ] DECF f,d
0 ≤ f ≤ 127
d ∈ [0,1]
(f) - 1 → (destination)
Z
Decrement register ‘f’. If ‘d’ = ‘0’,
the result is stored in the W
register. If ‘d’ = ‘1’, the result is
stored back in register ‘f’.
CY
instruction.
f,d
GOTO
Syntax:
Operands:
Operation:
Status Affected:
Description:
INCF
Syntax:
Operands:
Operation:
Status Affected:
Description:
INCFSZ
Syntax:
Operands:
Operation:
Status Affected:
Description:
Increment f, Skip if 0
[ label ]
0 ≤ f ≤ 127
d ∈ [0,1]
(f) + 1 → (destination),
None
The contents of register ‘f’ are
incremented. If ‘d’ = ‘0’, the result
is placed in the W register. If
‘d’ = ‘1’, the result is placed back
in register ‘f’.
If the result is ‘1’, the next instruc-
tion is executed. If the result is ‘0’,
a NOP is executed instead, making
it a 2 T
Unconditional Branch
[ label ]
0 ≤ k ≤ 2047
k → PC<10:0>
PCLATH<4:3> → PC<12:11>
None
GOTO is an unconditional branch.
The eleven-bit immediate value is
loaded into PC bits <10:0>. The
upper bits of PC are loaded from
PCLATH<4:3>. GOTO is a
two-cycle instruction.
Increment f
[ label ]
0 ≤ f ≤ 127
d ∈ [0,1]
(f) + 1 → (destination)
Z
The contents of register ‘f’ are
incremented. If ‘d’ = ‘0’, the result
is placed in the W register. If
‘d’ = ‘1’, the result is placed back
in register ‘f’.
skip if result = 0
CY
GOTO k
INCFSZ f,d
instruction.
INCF f,d
PIC16F72
DS39597B-page 77