PIC16F72-I/SO Microchip Technology Inc., PIC16F72-I/SO Datasheet - Page 107
PIC16F72-I/SO
Manufacturer Part Number
PIC16F72-I/SO
Description
28 PIN, 3.5 KB FLASH, 128 RAM, 22 I/O
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC16F72-ISO.pdf
(136 pages)
Specifications of PIC16F72-I/SO
A/d Inputs
5-Channel, 8-Bit
Cpu Speed
5 MIPS
Eeprom Memory
0 Bytes
Input Output
22
Interface
I2C/SPI
Memory Type
Flash
Number Of Bits
8
Package Type
28-pin SOIC
Programmable Memory
3.5K Bytes
Ram Size
128 Bytes
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16F72-I/SO
Manufacturer:
MICROCHIP
Quantity:
3 290
Part Number:
PIC16F72-I/SO
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
FIGURE 14-16:
TABLE 14-10: A/D CONVERSION REQUIREMENTS
2002 Microchip Technology Inc.
Note 1: ADRES register may be read on the following T
Param
No.
130
131
132
134
*
† Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only
A/D DATA
Note 1: If the A/D clock source is selected as RC, a time of T
SAMPLE
A/D CLK
ADRES
T
T
T
T
Sym
BSF ADCON0, GO
AD
CNV
ACQ
GO
These parameters are characterized but not tested.
and are not tested.
ADIF
GO
Q4
A/D Clock Period
Conversion Time (not including S/H time)
(Note 1)
Acquisition Time
Q4 to A/D Clock Start
SLEEP instruction to be executed.
134
132
A/D CONVERSION TIMING
Characteristic
(T
OSC
/2)
7
(1)
PIC16F72
PIC16LF72
PIC16F72
PIC16LF72
6
OLD_DATA
5
SAMPLING STOPPED
CY
4
cycle.
Min
131
130
1.6
2.0
2.0
3.0
5*
—
9
CY
3
is added before the A/D clock starts. This allows the
T
Typ† Max Units
OSC
4.0
6.0
—
—
—
—
/2 —
2
6.0
9.0
—
—
—
9
1
T
µs
µs
µs
µs
µs
—
AD
1 T
0
T
T
2.0V ≤ V
A/D RC mode
A/D RC mode
The minimum time is the
amplifier settling time. This
may be used if the “new”
input voltage has not
changed by more than 1 LSb
(i.e., 20.0 mV @ 5.12V) from
the last sampled voltage (as
stated on C
If the A/D clock source is
selected as RC, a time of T
is added before the A/D
clock starts. This allows the
SLEEP instruction to be
executed.
CY
OSC
OSC
PIC16F72
based, V
based,
NEW_DATA
DONE
Conditions
REF
DS39597B-page 105
HOLD
≤ 5.5V
REF
).
≥ 3.0V
CY