PEB3081FV14XP Lantiq, PEB3081FV14XP Datasheet - Page 107

• Manufacturer Part Number: PEB3081FV14XP
• Manufacturer: Lantiq

Specifications of PEB3081FV14XP

• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / Rohs Status: Compliant

Preliminary
Programming Sequence
The programming sequence is characterized by a ’1’ being sent in the lower nibble of the
received address code. The data structure after this first byte and the principle of a read/
write access to a register is similar to the structure of the serial control interface
described in
read access the header 40
DD 1st byte value
DD 2nd byte value
DD 3rd byte value
DD 4th byte value
DD (nth + 3) byte value
All registers can be read back when setting the R/W bit in the byte for the command/
register address. The SBCX-X responds by sending its IOM-2 specific address byte
(A1
3.7.3.5
To prevent lock-up situations in a MONITOR transmission a time-out procedure can be
enabled by setting the time-out bit (TOUT) in the MONITOR configuration register
(MCONF). An internal timer is always started when the transmitter must wait for the reply
of the addressed device. After 5 ms without reply the timer expires and the transmission
will be aborted with a EOM (End of Message) command by setting the MX bit to ’1’ for
two consecutive IOM-2 frames.
Data Sheet
h
) followed by the requested data.
MONITOR Time-Out Procedure
Chapter
3.2.2. For write access the header 43
R/W
H
/44
1
H
.
0
107
1
Header Byte
Register Address
0
Data 1
Data n
Description of Functional Blocks
0
H
/47
0
H
can be used and for
0
PEB 3081
PEF 3081
1
2000-09-27