PEB3081FV14XP Lantiq, PEB3081FV14XP Datasheet - Page 171

• Manufacturer Part Number: PEB3081FV14XP
• Manufacturer: Lantiq

Specifications of PEB3081FV14XP

• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / Rohs Status: Compliant

Preliminary
4.4.7
Value after reset: 01
ID
DESIGN ... Design Number
The design number allows to identify different hardware designs of the SBCX-X by
software.
01
(all other codes reserved)
4.4.8
Value after reset: 00
SRES
RES_xx ... Reset Functional Block xx
A reset can be activated on the functional block C/I-handler, Monitor channel, IOM
handler, S-transceiver and to pin RSTO.
Setting one of these bits to “1” causes the corresponding block to be reset for a duration
of 4 BCL clock cycles, except RES_RSTO which is activated for a duration of
125 ... 250µs. The bits are automatically reset to “0” again.
Data Sheet
H
: Version 1.3
7
7
ID - Identification Register
SRES - Software Reset Register
RES_
CI
0
H
H
0
0
0
RES_
MON
171
0
DESIGN
RES_
IOM
Detailed Register Description
RES_
TR
0
0
RSTO
RES_
PEB 3081
PEF 3081
2000-09-27
WR (64)
RD (64)