PEB3081FV14XP Lantiq, PEB3081FV14XP Datasheet - Page 123
PEB3081FV14XP
Manufacturer Part Number
PEB3081FV14XP
Description
Manufacturer
Lantiq
Datasheet
1.PEB3081FV14XP.pdf
(198 pages)
Specifications of PEB3081FV14XP
Number Of Line Interfaces
1
Control Interface
HDLC
Lead Free Status / Rohs Status
Compliant
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Preliminary
Table 14
CH2
0
0
0
0
1
1
1
1
For DCL = 1.536 MHz one of the IOM-2 channels 0 - 2 can be selected, for DCL = 4.096
MHz any of the eight IOM-2 channels can be selected.
The channel select pins have direct effect on the timeslot selection of the following
registers:
• TR_TSDP_BC1
• TR_TSDP_BC2
• TR_CR, TRC_CR
• DCI_CR, DCIC_CR
• MON_CR
Data Sheet
CH1
0
0
1
1
0
0
1
1
IOM-2 Channel Selection
CH0
0
1
0
1
0
1
0
1
Channel on IOM-2
0
1
2
3
4
5
6
7
123
Description of Functional Blocks
PEB 3081
PEF 3081
2000-09-27
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