PEB3081FV14XP Lantiq, PEB3081FV14XP Datasheet - Page 33

• Manufacturer Part Number: PEB3081FV14XP
• Manufacturer: Lantiq

Specifications of PEB3081FV14XP

• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / Rohs Status: Compliant

Preliminary
3.2.4
Figure 9
.
Figure 9
Reset Source Selection
The internal reset sources C/I code change, EAW and Watchdog can be output at the
low active reset pin RSTO. The selection of these reset sources can be done with the
RSS2,1 bits in the MODE1 register according
The setting RSS2,1 = ’01’ is reserved for further use. In this case no reset except
software reset (SRES.RSTO) is output on RSTO. The internal reset sources set the
MODE1 register to its reset value.
Data Sheet
C/I Code Change
(Exchange Awake)
EAW
(Subscriber Awake)
Watchdog
Software Reset
Register (SRES)
Reset
Functional
Block
Internal Reset of all Registers
shows the organization of the reset generation of the device.
Reset MODE1 Register
Reset Generation
Transceiver, C/I (22
IOM-2 (40
MON-channel (5C
General Config (60
Reset Generation
125µs
125µs
125µs
125µs
H
-5B
H
t
t
t
t
)
250µs
250µs
250µs
250µs
H
H
-5F
H
-6F
-3F
H
H
H
)
)
)
1
'0'
'1'
RSS1
'1x'
'00'
RSS2,1
33
Table
Description of Functional Blocks
5.
1
' 01 '
(reserved)
'01'
RSS2,1
1
PEB 3081
PEF 3081
2000-09-27
Pin
RES
Pin
RSTO
3081_21