PSB21150FV14XT Infineon Technologies, PSB21150FV14XT Datasheet - Page 75

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PSB21150FV14XT

Manufacturer Part Number
PSB21150FV14XT
Description
Manufacturer
Infineon Technologies
Datasheet

Specifications of PSB21150FV14XT

Number Of Line Interfaces
1
Control Interface
HDLC
Lead Free Status / Rohs Status
Compliant
– Leave for the state “F6 synchronized” after INFO 2 has been recognized on the S/T-
– Leave for the state “F7 activated” after INFO 4 has been recognized on the S/T-
– Leave for any unconditional state if any unconditional C/I command is received.
As can be seen from the transition criteria, combinations of multiple conditions are
possible as well. A “ * ” stands for a logical AND combination. And a “+” indicates a logical
OR combination.
The sections following the state diagram contain detailed information on all states and
signals used.
3.5.1
3.5.1.1
Figure 42
shows this for the unconditional transitions (Reset, Loop, Test Mode i).
Data Sheet
interface.
interface.
shows the state transition diagram of the IPAC-X state machine.
State Machine TE and LT-T Mode
State Transition Diagram (TE, LT-T)
75
Description of Functional Blocks
PSB/PSF 21150
2003-01-30
Figure 43
IPAC-X

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