PEB3086HV14XP Infineon Technologies, PEB3086HV14XP Datasheet - Page 127
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PEB3086HV14XP
Manufacturer Part Number
PEB3086HV14XP
Description
Manufacturer
Infineon Technologies
Datasheet
1.PEB3086HV14XP.pdf
(262 pages)
Specifications of PEB3086HV14XP
Control Interface
HDLC
Lead Free Status / Rohs Status
Compliant
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Table 14
Functional
Block
Layer 1
Layer 2
Note: For mode selection in the TR_MODE register the MODE2/1 bits are used to select
With the configuration settings shown above the ISAC-SX in intelligent NT applications
provides for equal access to the D-channel for terminals connected to the S-interface
and for D-channel sources on IOM-2.
For a detailed understanding the following sections provide a complete description on
the procedures used by the D-channel priority handler on IOM-2, although it may not be
necessary to study that in order to use this mode.
Data Sheet
intelligent NT mode, MODE0 selects NT or LT-S state machine.
Configuration
Description
Select Intelligent
NT mode
Enable S/G bit
evaluation
ISAC-SX Configuration Settings in Intelligent NT Applications
Configuration Setting
Transceiver Mode Register:
TR_MODE.MODE0 = 0 (NT state machine)
or
TR_MODE.MODE0 = 1 (LT-S state machine)
TR_MODE.MODE1 = 1
TR_MODE.MODE2 = 1
D-channel Mode Register:
MODED.DIM2-0 = 001
127
Description of Functional Blocks
PEB 3086
2003-01-30
ISAC-SX
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