PEB3086HV14XP Infineon Technologies, PEB3086HV14XP Datasheet - Page 36
PEB3086HV14XP
Manufacturer Part Number
PEB3086HV14XP
Description
Manufacturer
Infineon Technologies
Datasheet
1.PEB3086HV14XP.pdf
(262 pages)
Specifications of PEB3086HV14XP
Control Interface
HDLC
Lead Free Status / Rohs Status
Compliant
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Header 41
This sequence allows in front of the A-D-D-D write access a non-interleaved A-D-A-D
read access. This mode is useful for reading status information before writing to the
HDLC XFIFO. The termination condition of the read access is the reception of the wradr.
The sequence can have any length and is terminated by the rising edge of CS.
Example for a read/write access with header 41
Header 49
This sequence allows in front of the A-D-D-D write access an interleaved A-D-A-D read
access. This mode is useful for reading status information before writing to the HDLC
XFIFO. The termination condition of the read access is the reception of the wradr. The
sequence can have any length and is terminated by the rising edge of the CS line.
Example for a read/write access with header 49
Data Sheet
SDR header rdadr
SDR header rdadr
SDX
SDX
H
H
: Non-interleaved A-D-D-D Sequence
: Interleaved A-D-D-D Sequence
rddata
rddata rddata
rdadr
wradr wrdata
rdadr
36
rddata
(wradr)
H
H
:
:
wrdata
wradr wrdata
Description of Functional Blocks
(wradr)
wrdata
(wradr)
(wradr)
wrdata
(wradr)
PEB 3086
wrdata
2003-01-30
ISAC-SX
(wradr)
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