M471B5773DH0-YK0 Samsung Semiconductor, M471B5773DH0-YK0 Datasheet - Page 28
M471B5773DH0-YK0
Manufacturer Part Number
M471B5773DH0-YK0
Description
Manufacturer
Samsung Semiconductor
Datasheet
1.M471B5773DH0-YK0.pdf
(36 pages)
Specifications of M471B5773DH0-YK0
Lead Free Status / Rohs Status
Supplier Unconfirmed
Unbuffered SODIMM
[ Table 19 ] DDR3-1600 Speed Bins
Internal read command to first data
ACT to internal read or write delay time
PRE command period
ACT to ACT or REF command period
ACT to PRE command period
CL = 5
CL = 6
CL = 7
CL = 8
CL = 9
CL = 10
CL = 11
Supported CL Settings
Supported CWL Settings
Parameter
CL-nRCD-nRP
Speed
CWL = 6,7,8
CWL = 5,6,7
CWL = 7, 8
CWL = 5,6
CWL = 5,6
CWL = 5
CWL = 5
CWL = 6
CWL = 5
CWL = 6
CWL = 7
CWL = 8
CWL = 5
CWL = 6
CWL = 7
CWL = 8
CWL = 7
CWL = 8
CWL = 7
CWL = 8
CWL = 8
tCK(AVG)
tCK(AVG)
tCK(AVG)
tCK(AVG)
tCK(AVG)
tCK(AVG)
tCK(AVG)
tCK(AVG)
tCK(AVG)
tCK(AVG)
tCK(AVG)
tCK(AVG)
tCK(AVG)
tCK(AVG)
tCK(AVG)
tCK(AVG)
tCK(AVG)
tCK(AVG)
tCK(AVG)
tCK(AVG)
tCK(AVG)
Symbol
tRCD
tRAS
tAA
tRP
tRC
datasheet
- 29 -
(13.125)
(13.125)
(13.125)
(48.125)
13.75
13.75
13.75
48.75
1.875
1.875
1.25
min
3.0
2.5
1.5
1.5
35
8
8
8
8
5,6,7,8,9,10,11
DDR3-1600
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
11-11-11
5,6,7,8
9*tREFI
<1.875
<1.875
max
<2.5
<2.5
<1.5
3.3
3.3
20
-
-
-
DDR3L SDRAM
Units
nCK
nCK
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
1,2,3,4,7,9,10
1,2,3,4,7
1,2,3,4,7
1,2,3,4,7
1,2,3,4,7
1,2,3,4,7
1,2,3,7
1,2,3,7
1,2,3,4
1,2,3,4
1,2,3,7
1,2,3,4
1,2,3,8
NOTE
Rev. 1.0
4
4
4
4
4
4
4
4