CYNSE70128-66BGC Cypress Semiconductor Corp, CYNSE70128-66BGC Datasheet - Page 121

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CYNSE70128-66BGC

Manufacturer Part Number
CYNSE70128-66BGC
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CYNSE70128-66BGC

Operating Supply Voltage (min)
1.425V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / Rohs Status
Not Compliant

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Table 12-2. Required Idle Cycles Between Commands
Notes:
Document #: 38-02040 Rev. *F
13. When the register being read is SSR/SRR and it matches the target location of the previous search, a READ operation cannot be issued for 2+TLSZ idle cycles
14. The SRAM operation needs to insert idle cycles to avoid SADR bus contention with previous SEARCH.
x72/x144 = 1 Cycle
x72/x144 = 1 Cycle
to avoid reading the old value. Otherwise there is no idle cycle requirement.
x288 = 2 Cycles
# of Cycles
2 Cycles
1 Cycles
1 Cycle
1 Cycle
OPERATIONS
SRAM WRITE
SRAM READ
SEARCH
LEARN
WRITE
READ
5+TLSZ+HLAT 5+TLSZ+HLAT 5+TLSZ+HLAT 5+TLSZ+HLAT 5+TLSZ+HLAT
SEARCH
No Wait
5
1
1
2
No Wait / (2
+ TLSZ)
READ
5
1
1
2
13
No Wait
WRITE
5
1
1
2
No Wait
LEARN
5
1
1
2
CYNSE70128
TLSZ /(TLSZ
+ HLAT)
Page 121 of 137
SRAM
5
1
1
2
14

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