CYNSE70128-66BGC Cypress Semiconductor Corp, CYNSE70128-66BGC Datasheet - Page 3

• Manufacturer Part Number: CYNSE70128-66BGC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CYNSE70128-66BGC

• Operating Supply Voltage (min): 1.425V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / Rohs Status: Not Compliant

11.0 DEPTH-CASCADING ................................................................................................................. 102
12.0 SRAM ADDRESSING ................................................................................................................ 105
13.0 POWER ...................................................................................................................................... 122
14.0 APPLICATION ........................................................................................................................... 124
15.0 JTAG (1149.1) TESTING ........................................................................................................... 124
16.0 ELECTRICAL SPECIFICATIONS .............................................................................................. 125
17.0 AC TIMING WAVEFORMS ........................................................................................................ 126
18.0 PINOUT DESCRIPTION ............................................................................................................. 130
19.0 ORDERING INFORMATION ...................................................................................................... 135
20.0 PACKAGE DIAGRAM ................................................................................................................ 136
Document #: 38-02040 Rev. *F
11.1 Depth-Cascading up to Eight Devices (One Block) .............................................................. 102
11.2 Depth-Cascading up to 31 Devices (Four Blocks) ................................................................ 103
11.3 Depth-Cascading for a FULL Signal ..................................................................................... 104
12.1 Generating an SRAM BUS Address ..................................................................................... 106
12.2 SRAM PIO Access ................................................................................................................ 106
12.3 SRAM Read with a Table of One Device .............................................................................. 106
12.4 SRAM Read with a Table of up to Eight Devices .................................................................. 107
12.5 SRAM Read with a Table of up to 31 Devices ...................................................................... 110
12.6 SRAM Write with a Table of One Device .............................................................................. 113
12.7 SRAM Write with a Table of up to Eight Devices .................................................................. 114
12.8 SRAM Write with Table(s) of up to 31 Devices ..................................................................... 117
12.9 Timing Sequences for Back-to-Back searches ...................................................................... 120
13.1 Power-up Sequence ............................................................................................................. 122
13.2 Power Consumption .............................................................................................................. 123
17.1 Special Note for MULTI_HIT Function on the CYNSE70128 ................................................ 129
TABLE OF CONTENTS
(continued)
CYNSE70128
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