ST92T163R4T1 STMicroelectronics, ST92T163R4T1 Datasheet - Page 141
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ST92T163R4T1
Manufacturer Part Number
ST92T163R4T1
Description
Microcontrollers (MCU) OTP EPROM 20K USB/I2
Manufacturer
STMicroelectronics
Datasheet
1.ST92T163R4T1.pdf
(224 pages)
Specifications of ST92T163R4T1
Data Bus Width
8 bit, 16 bit
Program Memory Type
EPROM
Program Memory Size
20 KB
Data Ram Size
2 KB
Interface Type
I2C, SCI, USB
Maximum Clock Frequency
24 MHz
Number Of Programmable I/os
64
Number Of Timers
2
Operating Supply Voltage
4 V to 5.5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Package / Case
TQFP-64
Minimum Operating Temperature
0 C
On-chip Adc
8 bit
Lead Free Status / Rohs Status
No
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ST92T163R4T1L
Manufacturer:
ST
Quantity:
444
Part Number:
ST92T163R4T1L
Manufacturer:
ST
Quantity:
20 000
USB INTERFACE (Cont’d)
Interrupt sources are classified according to the
following table
CONTROL REGISTER (USBCTLR)
R252 - Read/Write
Register page: 15
Reset Value: 0001 0101 (15h)
Bit 7 = Reserved. This bit is fixed by hardware at 0.
Bit 6 = TIM_SUSP: Timed Suspend .
Set by software when the SUSP interrupt is re-
ceived to enter “timed-suspend” state.
0: Timed suspend inactive
1: Timed suspend active. The USB interface oper-
Bit 5 = Reserved.
Bit 4 = SDNAV: Single/Multiple Vector Selection .
This bit is set by software to select the single or
multiple interrupt vector mode .
0: Multiple interrupt vector mode
1: Single interrupt vector mode
See USBIVR register description for detailed infor-
mation.
7
0
ates as in suspend mode but clocks and static
power dissipation in the analog transceiver are
not stopped.
SUSP
TIM_
0
SDNAV
RESUME
PDWN
SUSP
LP_
FRES
0
Bit 3 = RESUME: Resume request .
Set by software to send a Resume signal to the
host.
0: Resume signal not forced on USB data lines.
1: Resume signal forced on USB data lines.
Bit 2 = PDWN: Power Down .
Set by software to turn off the 3.3V on-chip voltage
regulator that supplies the external pull-up resistor
and the transceiver.
Note: As a consequence the voltage on both USB
root port signal lines will drift to 0V because of the
pull-down resistors in the upstream USB host or
hub, generating a disconnect indication. At least 2
specifications after this bit is cleared, depending
on the value of the external bypass capacitor.
Bit 1 = LP_SUSP: Low-power suspend .
Set by software to put the USB interface in “low-
power suspend” state. This condition should be
entered
(TIM_SUSP=1).
0: Low-power suspend inactive
1: Low-power suspend active
Bit 0 = FRES: Force USB Reset .
Set by software to force a reset of the USB inter-
face, just like a RESET signal on the USB. The
USB interface is held in RESET state until soft-
ware clears this bit, and a “USB-RESET” interrupt
is generated, if enabled.
0: Reset not forced
1: USB interface reset forced
s are required until the 3.3V supply falls within
ST92163 - USB PERIPHERAL (USB)
while
in
“timed
suspend”
141/224
state