ADF7023-JBCPZ Analog Devices Inc, ADF7023-JBCPZ Datasheet - Page 48
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ADF7023-JBCPZ
Manufacturer Part Number
ADF7023-JBCPZ
Description
TXRX FSK/GFSK/MSK/GMSK 32LFCSP
Manufacturer
Analog Devices Inc
Series
-r
Datasheet
1.EVAL-ADF7023-JDB1Z.pdf
(100 pages)
Specifications of ADF7023-JBCPZ
Frequency
902MHz ~ 958MHz
Data Rate - Maximum
300kbps
Modulation Or Protocol
FSK, GFSK, GMSK, MSK
Applications
ISM
Power - Output
13.5dBm
Sensitivity
-116dBm
Voltage - Supply
2.2 V ~ 3.6 V
Current - Receiving
12.8mA
Current - Transmitting
32.1mA
Data Interface
PCB, Surface Mount
Memory Size
-
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
32-WFQFN Exposed Pad, CSP
Rf Ic Case Style
LFCSP
No. Of Pins
32
Supply Voltage Range
2.2V To 3.6V
Operating Temperature Range
-40°C To +85°C
Transmitting Current
32.1mA
Data Rate
300Kbps
Modulation Type
2FSK, GFSK, MSK
Rohs Compliant
Yes
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
ADF7023-J
PACKET RAM
The packet RAM consists of 256 bytes of memory space. The
first 16 bytes of this memory space are allocated for use by the
on-chip processor. The remaining 240 bytes of this memory
space are allocated for storage of data from valid received packets
and packet data to be transmitted. The communications processor
stores received payload data at the memory location indicated
by the value of the RX_BASE_ADR register (Address 0x125),
the receive address pointer. The value of the TX_BASE_ADR
RX_BASE_ADR
TX_BASE_ADR
AND RECEIVE
Figure 58. Example Packet RAM Configurations Using the Tx Packet and Rx Packet Address Pointers
TRANSMIT
TRANSMIT
PAYLOAD
PAYLOAD
RECEIVE
PACKET
0x010
0x0FF
RX_BASE_ADR
TX_BASE_ADR
Rev. 0 | Page 48 of 100
240 BYTE TRANSMIT
TRANSMIT OR
OR RECEIVE
PAYLOAD
RECEIVE
PACKET
register (Address 0x124), the transmit address pointer, determines
the start address of data to be transmitted by the communications
processor. This memory can be arbitrarily assigned to store
single or multiple transmit or receive packets, with and without
overlap. The RX_BASE_ADR value should be chosen to ensure
that there is enough allocated packet RAM space for the
maximum receiver payload length.
0x010
0x0FF
RX_BASE_ADR
RX_BASE_ADR
TX_BASE_ADR
TX_BASE_ADR
(PACKET 1)
(PACKET 2)
(PACKET 1)
(PACKET 2)
MULTIPLE TRANSMIT
AND RECEIVE
PAYLOAD 2
PAYLOAD 2
TRANSMIT
TRANSMIT
PACKETS
PAYLOAD
PAYLOAD
RECEIVE
RECEIVE
0x010
0x0FF