PSB3186FV1.4 Infineon Technologies, PSB3186FV1.4 Datasheet - Page 26

• Manufacturer Part Number: PSB3186FV1.4
• Description: ISDN Interface ISDN
• Manufacturer: Infineon Technologies

Specifications of PSB3186FV1.4

• Control Type: HDLC
• Data Rate: 192 Kbps
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3.3 V
• Package / Case: MQFP-64
• Lead Free Status / Rohs Status: Details

3
3.1
Figure 4
• S/T-interface transceiver supporting TE mode
• Different host interface modes:
• Optional indirect register address mode reduces number of registers to be accessed
• One D-channel HDLC-controller with 64 byte FlFOs per direction with programmable
• IOM-2 interface for terminal mode (TE)
• One serial data strobe signals (SDS)
• IOM handler with controller data access registers (CDA) allows flexible access to IOM
• Synchronous transfer interrupts (STI) allow controlled access to IOM timeslots
• MONITOR channel handler on IOM-2 for master mode, slave mode or data exchange
• C/I-channel handler and TIC bus access controller
• D-channel access mechanism
• LED connected to pin ACL indicates S-interface activation status automatically or can
• Level detect circuit on the S interface reduces power consumption in power down
• Two timers for periodic or single interrupts (periods between 1 ms and 14.336 s)
• Clock and timing generation
• Digital PLL to synchronize the transceiver to the S/T interface
• Buffered 7.68 MHz oscillator clock output allows connection of further devices and
• Reset generation (watchdog timer)
Data Sheet
- Parallel microcontroller interface
- Serial Control Interface (SCI)
to two locations
FIFO block size (threshold) of 4, 8, 16 or 32 byte (receive) and 16 or 32 byte (transmit).
timeslots for reading/writing, looping and shifting data
be controlled by the host
mode
saves another crystal on the system board
(Siemens/Intel multiplexed, Siemens/Intel non multiplexed, Motorola modes)
shows the architecture of the ISAC-SX TE containing the following functions:
Description of Functional Blocks
General Functions and Device Architecture
26
Description of Functional Blocks
PSB 3186
PSF 3186
2000-08-23