PSB3186FV1.4 Infineon Technologies, PSB3186FV1.4 Datasheet - Page 66

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PSB3186FV1.4

Manufacturer Part Number
PSB3186FV1.4
Description
ISDN Interface ISDN
Manufacturer
Infineon Technologies
Datasheet

Specifications of PSB3186FV1.4

Control Type
HDLC
Data Rate
192 Kbps
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Operating Supply Voltage
3.3 V
Package / Case
MQFP-64
Lead Free Status / Rohs Status
 Details
Figure 33
3.5.1.2
F3 Pending Deactivation
State after deactivation from the S/T interface by info 0. Note that no activation from the
terminal side is possible starting from this state. A ’DI’ command has to be issued to enter
the state ’Deactivated State’.
F3 Deactivated State
The S/T interface is deactivated and the clocks are deactivated 500 µs after entering this
state and receiving info 0 if the CFS bit of the ISAC-SX TE Configuration Register is set
to “0“. Activation is possible from the S/T interface and from the IOM-2 interface.
F3 Power Up
The S/T interface is deactivated (info 0 on the line) and the clocks are running.
Data Sheet
TIM
DI
States (TE)
Test Mode i
TMA
State Transition Diagram of Unconditional Transitions (TE)
it
i
SCP
SSP
SCP
SSP
*
TIM
DI
TIM
DI
Loop A Activated
Loop A Closed
RSY
ARL ARL
AIL
i3
i3
ARL
i3
66
ARL
*
*
i3
Description of Functional Blocks
TIM
DI
RES RES
i0
Reset
State
Any
RES
*
PSB 3186
PSF 3186
RST
2000-08-23
statem_te_aloop_s.vsd

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