SDKZSPF LSI, SDKZSPF Datasheet - Page 170

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SDKZSPF

Manufacturer Part Number
SDKZSPF
Description
Manufacturer
LSI
Datasheet

Specifications of SDKZSPF

Lead Free Status / Rohs Status
Supplier Unconfirmed
8.2.29 set delay (for zsim400 only)
8.2.30 set latency (for zsimg2 only)
8-28
Example –
Breakpoint 1 on PC at address 0x0010
Breakpoint 2 on PC at address 0xf9b9 of main
This command sets the delay wait state of external data memory or
instruction memory. The default delay value is 1 for both external data
and instruction memory.
The wait state is the number of cycles between requesting data and
having it returned. For example, wait state equals 1 means that data is
returned 1 cycle after it is requested.
Format –
Example –
This command sets the delay wait state of internal/external data memory
or instruction memory. The default delay value is 2 for both internal data
and instruction memory. The default delay value is 5 for both external
data and instruction memory.
The wait state is the number of cycles between requesting data and
having it returned. For example, wait state equals 2 means that data is
returned 2 cycles after it is requested.
Format –
Example –
ZSP SDK Cycle-Accurate Simulator
Copyright © 1999-2003 by LSI Logic Corporation. All rights reserved.
zsim{1} set break pc 0x0010
zsim{2} set break symbol main
set delay {edata | einst} num
zsim{1} set delay edata 10
zsim{2} set delay einst 20
set latency {imem | dmem} {int | ext} num
zsim{1} set latency dmem int 10
zsim{2} set latency dmem ext 20