SDKZSPF LSI, SDKZSPF Datasheet - Page 197

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SDKZSPF

Manufacturer Part Number
SDKZSPF
Description
Manufacturer
LSI
Datasheet

Specifications of SDKZSPF

Lead Free Status / Rohs Status
Supplier Unconfirmed
Table 9.7
Table 9.8
Command
enable_ice
resume
step n
insn_addr_brk addr
st_addr_brk addr
st_data_brk data
st_addr_and_data_brk addr
data
st_addr_or_data_brk addr data Set a breakpoint when storing to addr or storing the value
disable_brk
return_to_sw_dbg
Command
enable_ice
resume
step n
insn_addr0_brk addr
...
insn_addr3_brk addr
disable_insn_addr0_brk
...
disable_insn_addr3_brk
Hardware-Assisted Debugging Commands for G1
Hardware-Assisted Debugging Commands for G2
The commands available for hardware-assisted debugging are shown in
Table
refer to
Debugger Execution Environments
Copyright © 1999-2003 by LSI Logic Corporation. All rights reserved.
9.8. For an example on how to use hardware-assisted debugging,
Section 9.6.2, “Example 2,” page
Description
Enable hardware-assisted debugging.
Resume execution.
Step n cycles.
Set a breakpoint when executing an instruction at addr.
Set a breakpoint when storing to addr.
Set a breakpoint when storing the value data.
Set a breakpoint when storing data to addr.
data.
Disable hardware breakpoint.
Return to software debug mode. Must have executed in
hardware debug mode for at least one cycle in order for this to
work.
Description
Enable hardware-assisted debugging.
Resume execution.
Step n cycles.
Set a breakpoint when executing an instruction at addr.
Disable instruction address breakpoint.
9-21.
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