LFEC3E-3QN208I Lattice, LFEC3E-3QN208I Datasheet - Page 244

• Manufacturer Part Number: LFEC3E-3QN208I
• Description: IC FPGA 3KLUTS 208PQFP
• Manufacturer: Lattice
• Series: EC3r

Specifications of LFEC3E-3QN208I

• Number Of Logic Elements/cells: 3100
• Number Of Labs/clbs: -
• Total Ram Bits: 56320
• Number Of I /o: 145
• Number Of Gates: -
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 208-BFQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: Q6377645

Lattice Semiconductor
Table 9-14. PFU based Distributed Single port RAM Port Definitions
Users have an option of enabling the output registers for Distributed Single Port RAM (Distributed_SPRAM). Fig-
ures 8-35 and 8-36 show the internal timing waveforms for the Distributed Single Port RAM (Distributed_SPRAM)
with these options.
Figure 9-53. PFU Based Distributed Single Port RAM Timing Waveform - Without Output Registers
ClockEn
Address
Clock
Data
Clock
ClockEn
Reset
WE
Address
Data
Q
WE
Q
Generated Module
Port Name in
t
t
SUWREN_PFU
SUADDR_PFU
t
SUDATA_PFU
Data_0
Add_0
Invalid Data
CK
-
-
WRE
AD[3:0]
DI[1:0]
DO[1:0]
Port Name in the EBR
t
t
HADDR_PFU
HDATA_PFU
Block Primitive
Data_1
Add_1
t
HWREN_PFU
t
CORAM_PFU
9-45
Clock
Clock Enable
Reset
Write Enable
Address
Data In
Data Out
Add_0
Description
LatticeECP/EC and LatticeXP Devices
Data_0
Add_1
Data_1
Rising Clock Edge
Active High
Active High
Active High
—
—
—
Memory Usage Guide
Active State
Add_2
Data_2