LFEC3E-3QN208I Lattice, LFEC3E-3QN208I Datasheet - Page 46
![no-image](/images/manufacturer_photos/0/3/380/lattice_sml.jpg)
LFEC3E-3QN208I
Manufacturer Part Number
LFEC3E-3QN208I
Description
IC FPGA 3KLUTS 208PQFP
Manufacturer
Lattice
Series
EC3r
Datasheets
1.LFEC3E-5TN144C.pdf
(163 pages)
2.LFE3-35EA-8FN672I.pdf
(21 pages)
3.LFEC3E-3QN208I.pdf
(478 pages)
Specifications of LFEC3E-3QN208I
Number Of Logic Elements/cells
3100
Number Of Labs/clbs
-
Total Ram Bits
56320
Number Of I /o
145
Number Of Gates
-
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
208-BFQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
Q6377645
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LFEC3E-3QN208I
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
- Current page: 46 of 478
- Download datasheet (13Mb)
Lattice Semiconductor
Oscillator
Every LatticeECP/EC device has an internal CMOS oscillator which is used to derive a master clock for configura-
tion. The oscillator and the master clock run continuously. The default value of the master clock is 2.5MHz. Table 2-
15 lists all the available Master Clock frequencies. When a different Master Clock is selected during the design pro-
cess, the following sequence takes place:
1. User selects a different Master Clock frequency.
2. During configuration the device starts with the default (2.5MHz) Master Clock frequency.
3. The clock configuration settings are contained in the early configuration bit stream.
4. The Master Clock frequency changes to the selected frequency once the clock configuration bits are received.
For further information about the use of this oscillator for configuration, please see the list of technical documenta-
tion at the end of this data sheet.
Table 2-15. Selectable Master Clock (CCLK) Frequencies During Configuration
Density Shifting
The LatticeECP/EC family has been designed to ensure that different density devices in the same package have
the same pin-out. Furthermore, the architecture ensures a high success rate when performing design migration
from lower density parts to higher density parts. In many cases, it is also possible to shift a lower utilization design
targeted for a high-density device to a lower density device. However, the exact details of the final resource utiliza-
tion will impact the likely success in each case.
CCLK (MHz)
10.0
2.5*
4.3
5.4
6.9
8.1
9.2
CCLK (MHz)
2-33
13
15
20
26
30
34
41
CCLK (MHz)
LatticeECP/EC Family Data Sheet
130
45
51
55
60
—
—
Architecture
Related parts for LFEC3E-3QN208I
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
![LFEC3E-3T144I](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
FPGA - Field Programmable Gate Array 3.1K LUTs 97 IO 1.2V -3 Spd I
Manufacturer:
Lattice
![LFEC3E-3T100I](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
FPGA - Field Programmable Gate Array 3.1K LUTs 67 IO 1.2V -3 Spd I
Manufacturer:
Lattice
![LFEC3E-3Q208I](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
FPGA - Field Programmable Gate Array 3.1K LUTs 145 IO 1.2 V -3 Spd I
Manufacturer:
Lattice
![LFEC3E-3FN256C](/images/manufacturer_photos/0/3/381/lattice_semiconductor_tmb.jpg)
Part Number:
Description:
FPGA LatticeEC Family 3100 Cells 340MHz 130nm (CMOS) Technology 1.2V 256-Pin FBGA
Manufacturer:
LATTICE SEMICONDUCTOR
Datasheet:
![LFEC3E-5TN144C](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
FPGA - Field Programmable Gate Array 3.1K LUTs Pb-Free
Manufacturer:
Lattice
Datasheet:
![LFEC3E-3QN208C](/photos/16/15/161504/qfp208_tmb.jpg)
Part Number:
Description:
FPGA - Field Programmable Gate Array 3.1K LUTs
Manufacturer:
Lattice
Datasheet:
![LFEC3E-3F256I](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
FPGA LatticeEC Family 3100 Cells 340MHz 130nm (CMOS) Technology 1.2V 256-Pin FBGA
Manufacturer:
Lattice
Datasheet:
![LFEC3E-3TN100C](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
IC FPGA 3.1KLUTS 67I/O 100-TQFP
Manufacturer:
Lattice
Datasheet:
![LFEC3E-3TN144I](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
IC FPGA 3.1KLUTS 97I/O 144-TQFP
Manufacturer:
Lattice
Datasheet:
![LFEC3E-4TN144C](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
IC FPGA 3.1KLUTS 97I/O 144-TQFP
Manufacturer:
Lattice
Datasheet:
![LFEC3E-3F256C](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
IC FPGA 3.1KLUTS 160I/O 256-BGA
Manufacturer:
Lattice
Datasheet:
![LFEC3E-5TN100C](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
IC FPGA 3.1KLUTS 67I/O 100-TQFP
Manufacturer:
Lattice
Datasheet:
![LFEC3E-4QN208C](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
IC FPGA 3.1KLUTS 145I/O 208-PQFP
Manufacturer:
Lattice
Datasheet:
![LFEC3E-4F256C](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
IC FPGA 3.1KLUTS 160I/O 256-BGA
Manufacturer:
Lattice
Datasheet:
![LFEC3E-4FN256C](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
IC FPGA 3.1KLUTS 160I/O 256-BGA
Manufacturer:
Lattice
Datasheet: