SAK-C167CS-L33M Infineon Technologies, SAK-C167CS-L33M Datasheet - Page 16

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SAK-C167CS-L33M

Manufacturer Part Number
SAK-C167CS-L33M
Description
Manufacturer
Infineon Technologies
Datasheet

Specifications of SAK-C167CS-L33M

Cpu Family
C166
Device Core Size
16b
Frequency (max)
33MHz
Interface Type
CAN/SPI/USART
Program Memory Type
ROMLess
Program Memory Size
Not Required
Total Internal Ram Size
11KB
# I/os (max)
111
Number Of Timers - General Purpose
5
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4.5V
On-chip Adc
24-chx10-bit
Instruction Set Architecture
CISC/RISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
144
Package Type
MQFP
Lead Free Status / Rohs Status
Supplier Unconfirmed

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SAK-C167CS-L33M
Manufacturer:
HITACHI
Quantity:
6 220
Part Number:
SAK-C167CS-L33M CA+
Manufacturer:
Infineon Technologies
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Table 2
Symbol Pin
RSTIN
RST
OUT
NMI
V
V
Data Sheet
AREF
AGND
Num.
140
141
142
37
38
Pin Definitions and Functions (cont’d)
Input
Outp.
I/O
O
I
Function
Reset Input with Schmitt-Trigger characteristics. A low level
at this pin while the oscillator is running resets the C167CS.
An internal pullup resistor permits power-on reset using only
a capacitor connected to
A spike filter suppresses input pulses <10 ns. Input pulses
>100 ns safely pass the filter. The minimum duration for a
safe recognition should be 100 ns + 2 CPU clock cycles.
In bidirectional reset mode (enabled by setting bit BDRSTEN
in register SYSCON) the RSTIN line is internally pulled low
for the duration of the internal reset sequence upon any reset
(HW, SW, WDT). See note below this table.
Note: To let the reset configuration of PORT0 settle and to
Internal Reset Indication Output. This pin is set to a low level
when the part is executing either a hardware-, a software- or
a watchdog timer reset. RSTOUT remains low until the EINIT
(end of initialization) instruction is executed.
Non-Maskable Interrupt Input. A high to low transition at this
pin causes the CPU to vector to the NMI trap routine. When
the PWRDN (power down) instruction is executed, the NMI
pin must be low in order to force the C167CS to go into power
down mode. If NMI is high, when PWRDN is executed, the
part will continue to run in normal mode.
If not used, pin NMI should be pulled high externally.
Reference voltage for the A/D converter.
Reference ground for the A/D converter.
let the PLL lock a reset duration of ca. 1 ms is
recommended.
12
V
SS
.
C167CS-4R
V2.2, 2001-08
C167CS-L

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