MC68EC040RC25 Freescale Semiconductor, MC68EC040RC25 Datasheet - Page 175

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MC68EC040RC25

Manufacturer Part Number
MC68EC040RC25
Description
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68EC040RC25

Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
25MHz
Instruction Set Architecture
RISC
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Through Hole
Pin Count
179
Package Type
PGA
Lead Free Status / Rohs Status
Supplier Unconfirmed

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7.5.1.2 AUTOVECTOR INTERRUPT ACKNOWLEDGE BUS CYCLE. When the
interrupting device cannot supply a vector number, it requests an automatically generated
vector (autovector). Instead of placing a vector number on the data bus and asserting TA,
the device asserts the autovector (AVEC) signal with TA to terminate the cycle. AVEC is
only sampled with TA asserted. AVEC can be grounded if all interrupt requests are
autovectored.
The vector number supplied in an autovector operation is derived from the interrupt priority
level of the current interrupt. When the AVEC signal is asserted with TA during an interrupt
acknowledge bus cycle, the M68040 ignores the state of the data bus and internally
MOTOROLA
Figure 7-22. Interrupt Acknowledge Bus Cycle Timing
UPA1, UPA0
TM2–TM0
TT1, TT0
D31–D8
A31–A0
CIOUT
Freescale Semiconductor, Inc.
D7–D0
AVEC
BCLK
SIZ0
SIZ1
R/W
TIP
For More Information On This Product,
TS
TA
ACKNOWLEDGE
C1
INTERRUPT
Go to: www.freescale.com
M68040 USER’S MANUAL
BYTE
C2
VECTOR #
INTERRUPT LEVEL
C1
WRITE STACK
C2
7- 33

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