MC68EC040RC25 Freescale Semiconductor, MC68EC040RC25 Datasheet - Page 378

• Manufacturer Part Number: MC68EC040RC25
• Manufacturer: Freescale Semiconductor

Specifications of MC68EC040RC25

• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Pin Count: 179
• Package Type: PGA
• Lead Free Status / Rohs Status: Supplier Unconfirmed

With the exception of the memory management unit (MMU), the floating-point unit (FPU),
and their respective registers, the MC68EC040 programming model, data formats and
types, instruction set (except all instructions beginning with an “F”, PTEST, and PFLUSH),
and caches are the same as described in Section 1 Introduction for the MC68040. Figures
B-2 and B-3 illustrate the programming model and functional signal groups for the
MC68EC040.
B.1 MC68EC040 DIFFERENCES
The following differences exist between the MC68EC040 and MC68040:
B-2
MC68EC040
• Two independent access control units (ACUs) replace the MC68040 MMUs. The ACU
has four corresponding registers (access control registers) that the MC68040 imple-
ments as data transparent translation registers. The page size is fixed at 4 Kbytes.
INSTRUCTION
REV2.3 (01/31/2000)
WRITE-BACK
INTEGER UNIT
CALCULATE
EFFECTIVE
EFFECTIVE
ADDRESS
ADDRESS
EXECUTE
DECODE
FETCH
FETCH
Freescale Semiconductor, Inc.
Figure B-1. MC68EC040 Block Diagram
For More Information On This Product,
INSTRUCTION MEMORY MANAGEMENT UNIT
INSTRUCTION
DATA MEMORY MANAGEMENT UNIT
INSTRUCTION DATA BUS
OPERAND DATA BUS
DATA
Go to: www.freescale.com
ATC
CACHE/ACCESS/SNOOP
ATC
M68040 USER’S MANUAL
CACHE/ACCESS/SNOOP
INSTRUCTION
CONTROLLER
CONTROLLER
DATA
INSTRUCTION
CACHE
CACHE
DATA
INSTRUCTION
ADDRESS
ADDRESS
DATA
B
U
S
C
O
N
T
R
O
L
L
E
R
CONTROL
ADDRESS
SIGNALS
DATA
BUS
BUS
BUS
MOTOROLA