MC68EC040RC25 Freescale Semiconductor, MC68EC040RC25 Datasheet - Page 203

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MC68EC040RC25

Manufacturer Part Number
MC68EC040RC25
Description
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68EC040RC25

Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
25MHz
Instruction Set Architecture
RISC
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Through Hole
Pin Count
179
Package Type
PGA
Lead Free Status / Rohs Status
Supplier Unconfirmed

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7.9.2 Snoop-Enabled Cycle (No Intervention Required)
For alternate bus master accesses in which SCx = $1 or $2, indicating that snooping is
enabled, the M68040 continues to assert MI while checking for a matching cache line. If
intervention in the alternate bus master access is not required, MI is then negated, and
memory is allowed to respond and complete the access. Figure 7-41 illustrates an
example of snooping in which memory is allowed to respond. Best-case timing is
MOTOROLA
*
SIZ1, SIZ0
SC1, SC0
TT1, TT0
D31–D0
AM indicates the alternate bus master.
A31–A0
AM_BR
AM_BG
BCLK
R/W
BR
BG
TS
TA
BB
MI
*
Undefined
*
Freescale Semiconductor, Inc.
Figure 7-40. Snoop-Inhibited Bus Cycle
PROCESSOR
For More Information On This Product,
C1
Go to: www.freescale.com
C2
M68040 USER’S MANUAL
C3
C1
ALTERNATE
MASTER
C2
C3
PROCESSOR
7- 61

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