MC68EC040RC25 Freescale Semiconductor, MC68EC040RC25 Datasheet - Page 184

• Manufacturer Part Number: MC68EC040RC25
• Manufacturer: Freescale Semiconductor

Specifications of MC68EC040RC25

• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Pin Count: 179
• Package Type: PGA
• Lead Free Status / Rohs Status: Supplier Unconfirmed

On the initial cycle of a line transfer, a retry causes the processor to retry the bus cycle as
illustrated in Figure 7-29. However, the processor recognizes a retry signaled during the
second, third, or fourth cycle of a line as a bus error and causes the processor to abort the
line transfer. A burst-inhibited line transfer can only be retried on the initial transfer. A
burst-inhibited line transfer aborts if a retry is signaled for any of the three long-word
transfers used to complete the line transfer. Negating the bus grant (BG) signal on the
M68040 while asserting both TA and TEA provides a relinquish and retry operation for any
bus cycle that can be retried (see Figure 7-31).
7-42
UPA1, UPA0
SIZ1, SIZ0
TM2–TM0
TT1, TT0
D31–D0
A31–A0
CIOUT
BCLK
R/W
TEA
TBI
TIP
TS
TA
Figure 7-29. Retry Operation on Line Write
Freescale Semiconductor, Inc.
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For More Information On This Product,
SIGNALED
RETRY
LINE
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M68040 USER’S MANUAL
Go to: www.freescale.com
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RETRY CYCLE
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MOTOROLA