SAA7146AH NXP Semiconductors, SAA7146AH Datasheet
SAA7146AH
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DATA SHEET SAA7146A Multimedia bridge, high performance Scaler and PCI circuit (SPCI) Product specification Supersedes data of 1998 Apr 09 INTEGRATED CIRCUITS 2004 Aug 25 ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) CONTENTS 1 FEATURES 1.1 Video processing 1.2 Audio processing 1.3 Scaling 1.4 Interfacing 1.5 General 2 GENERAL DESCRIPTION 3 QUICK REFERENCE DATA 4 ORDERING INFORMATION 5 BLOCK DIAGRAM 6 ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) 1 FEATURES 1.1 Video processing Full size, full speed video delivery to and from the frame buffer or virtual system memory enables various processing possibilities for any external PCI ...
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... I2S T operating ambient temperature amb 4 ORDERING INFORMATION TYPE NUMBER NAME SAA7146AH QFP160 plastic quad flat package; 160 leads (lead length 1.6 mm); body 28 2004 Aug 25 2 GENERAL DESCRIPTION The SAA7146A, Multimedia PCI-bridge highly integrated circuit for DeskTop Video (DTV) applications. The device provides a number of interface ports that ...
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Acrobat reader. white to force landscape pages to be ... SAA7146A I/O GPIO PORT C-bus I C-BUS MASTER Intel/ DEBI PORT ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) 6 PINNING SYMBOL PIN STATUS D1_A0 1 I/O D1_A1 2 I/O D1_A2 3 I/O D1_A3 4 I DDD1 SSD1 D1_A4 7 I/O D1_A5 ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) SYMBOL PIN STATUS AD_PCI24 40 I/O C/BE[3]# 41 I/O IDSEL 42 I AD_PCI23 43 I/O AD_PCI22 44 I/O AD_PCI21 45 I/O AD_PCI20 46 I DDD6 V ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) SYMBOL PIN STATUS SSD11 AD_PCI5 82 I/O AD_PCI4 83 I/O AD_PCI3 84 I/O AD_PCI2 85 I DDD11 SSD12 AD_PCI1 88 ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) SYMBOL PIN STATUS WS0 121 I/O SD0 122 I/O BCLK1 123 I/O WS1 124 O SD1 125 I/O WS2 126 O SD2 127 I/O V 128 P DDD17 V ...
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... For continuous CCIR 656 format at the D1_A port this pin must be set HIGH. 2. For continuous CCIR 656 format at the D1_B port this pin must be set HIGH. handbook, halfpage 2004 Aug 25 1 120 SAA7146AH 40 81 MHB045 Fig.2 Pin configuration. 10 Product specification ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) 7 FUNCTIONAL DESCRIPTION This chapter provides information about the features realized with this device. First, a general, thus short, description of the functionality is given. The following sections deal ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) 7.2 PCI interface This section describes the interface of the SAA7146A to the PCI-bus. This includes the PCI modules, the DMA controls of the video, audio and data channels, ...
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Acrobat reader. white to force landscape pages to be ... MEMORY MANAGEMENT physical address UNIT (MMU) data byte enable bus command CE PCI EOT ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) Table 1 Configuration space registers ADDRESS NAME (HEX) 00 Device Vendor Status Register and 25 24 ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) 7.2.2 V DMA IDEO CONTROL The SAA7146A’s DMA control is able to support up to three independent video targets or sources respectively. For this purpose it provides three video ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) Table 3 Video DMA control registers OFFSET NAME BIT (HEX) 00 BaseOdd1 BaseEven1 ProtAddr1 and 0 0C ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) OFFSET NAME BIT (HEX) 28 RW2 2 Swap2 1 and 0 2C NumLines2 NumBytes2 BaseOdd3 BaseEven3 31 ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) The video channels provide 32 bits of data signals and 4 bits of Byte Enable (BE) signals, End-Of-Line (EOL), End-Of-Window (EOW), Begin-Of-Field (BOF), Line-Locked Clock (LLC), Odd/Even signal (OE) ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) Table 4 Protection violation handling modes LIMIT PV 0000 0 Lock input of FIFO and empty FIFO (only in write mode). Unlock FIFO and start next transfer using the ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) 7.2.3 A DMA UDIO CONTROL The SAA7146A provides up to four audio DMA channels, each using a FIFO of 24 Dwords. Two channels are read only (A1_in and A2_in) ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) OFFSET NAME (HEX) AC BaseA2_in ProtA2_in and 0 B4 PageA2_in MEA2_in LimitA2_in 7 to ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) 7.2 EMORY ANAGEMENT 7.2.4.1 Introduction To perform DMA transfers, physically continuous memory space is needed. However, operating systems such as Microsoft Windows are working with virtual demand ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) Physical memory handbook, full pagewidth (4 kbyte pages) 00000H 00007H 0000FH 00017 H 0001FH = allocated memory space = page table 2004 Aug 25 PAGE TABLE BASE ADDRESS (00006H) ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) 7.2.5 I NTERNAL ARBITRATION CONTROL The SAA7146A has up to three video DMA channels, four audio DMA channels and three other DMA channels (RPS, MMU and DEBI) each trying ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) Table 6 Arbitration control registers OFFSET NAME (HEX) 48 BurstDebi Burst3 Thresh3 Burst2 Thresh2 ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) 7.2.6 S TATUS INFORMATION OF THE Table 9 lists the status information that the PCI interface makes available to the user in addition to the interrupt sources that are ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) Table 10 Main control register 1 OFFSET NAME BIT (HEX) Mask word FC M15 to M00 Control word FC MRST_N 15 14 ERPS1 13 ERPS0 ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) Table 11 Main control register 2 OFFSET NAME (HEX) Mask word 100 M15 to M00 Control word 100 RPS_SIG4 15 RPS_SIG3 14 RPS_SIG2 13 RPS_SIG1 ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) 7.4 Register Programming Sequencer (RPS) The RPS is used as an additional method to program or read the registers of the SAA7146A. Its main function is programming the registers ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) 7.4.3 C OMMAND LIST An instruction list of an RPS task is built in the system memory by the device driver. This list is made up of command sequences; ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) 7.4.4.7 INTERRUPT The INTERRUPT command will set the RPS_I bit of the task in the Interrupt status register (see Table 41 executed and the condition described ...
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Acrobat reader. white to force landscape pages to be ... Table 14 PAUSE command format D31 TO D28 D27 D26 D25 0010 OAN INV ...
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Acrobat reader. white to force landscape pages to be ... Table 18 CHECK_LATE Command Dword format D31 TO D28 D27 D26 D25 0011 OAN ...
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Acrobat reader. white to force landscape pages to be ... Table 24 INTERRUPT Command format D31 TO D28 D27 D26 D25 0110 OAN INV ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) 7.4.4.10 LDREG and STREG The Load Register (LDREG) command has a variable Dword count specified by the Block_length least two Dwords long and at maximum 256 ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) 7.4.4.11 MASKLOAD The MASKLOAD command is a three Dword command. Its purpose is to modify only portions or selected bits of a SAA7146A register. The first Dword of the ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) Table 34 RPS page register OFFSET NAME (HEX) C4 RPS_PAGE0 ERPSP0 0 C8 RPS_PAGE1 ERPSP1 0 7.4.7 ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) 7.4.8 RPS TIME OUT VALUE These registers contain the values for the time out conditions of the PAUSE and CHECK_LATE commands for each task. If the selected counter value ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) 7.5 Status and interrupts 7.5.1 G ENERAL In order to control the SAA7146A, the status information is collected and stored in two status registers: Primary Status Register (PSR) and ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) OFFSET NAME BIT (HEX) 110 RPS_TO0 21 UPLD 20 DEBI_S 19 DEBI_E 18 IIC_S 17 IIC_E 16 A2_in 15 A2_out 14 A1_in 13 A1_out 12 AFOU 11 V_PE 10 ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) OFFSET NAME BIT (HEX) 110 FIDA 8 FIDB 7 PIN3 6 PIN2 5 PIN1 4 PIN0 3 ECS 2 EC3S 1 EC0S 0 Table 39 Secondary status register OFFSET ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) OFFSET NAME BIT (HEX) 114 RPS_RE0 26 RPS_PE0 25 RPS_A0 24 DEBI_TO 23 DEBI_EF 22 IIC_EA 21 IIC_EW 20 IIC_ER 19 IIC_EL 18 IIC_EF 17 V3P 16 V2P 15 ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) OFFSET NAME BIT (HEX) 114 VF2 12 VF1 11 AF2_in 10 AF2_out 9 AF1_in 8 AF1_out 7 6 VGT 5 LNQG 4 EC5S 3 EC4S 2 EC2S 1 EC1S ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) Table 40 Interrupt enable register OFFSET NAME (HEX) DC PPEF 31 PABO 30 PPED 29 RPS_I1 28 RPS_I0 27 RPS_late1 26 RPS_late0 25 RPS_E1 24 RPS_E0 23 RPS_TO1 22 ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) Table 41 Interrupt status register OFFSET NAME BIT (HEX) 10C PPEF 31 PABO 30 PPED 29 RPS_I1 28 RPS_I0 27 RPS_late1 26 RPS_late0 25 RPS_E1 24 RPS_E0 23 RPS_TO1 ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) 7.6 General Purpose Inputs/Outputs (GPIO) 7.6.1 G ENERAL The SAA7146A has four general purpose I/O pins. For example, they could be used to signal to other devices a power-down ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) Table 45 Event Counter set 2 Register (EC2R) OFFSET NAME BIT (HEX) 11C EC5 [9: EC4 [9: EC3 [11: ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) ADDRESS STATUS BIT (HEX) 04 RPS_I0 05 RPS_LATE1 06 RPS_LATE0 07 RPS_E1 08 RPS_E0 09 RPS_TO1 0A RPS_TO0 0B UPLD 0C DEBI_S 0D DEBI_E 0E IIC_S 0F IIC_E 10 ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) ADDRESS STATUS BIT (HEX) 2C IIC_ER 2D IIC_EL 2E IIC_EF 2F V3P 30 V2P 31 V1P 32 VF3 33 VF2 34 VF1 35 AF2_in 36 AF2_out 37 AF1_in 38 ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) Table 50 Event Counter Threshold set 2 Register (ECT2R) OFFSET NAME (HEX) F0 ECT6 [9: ECT5 [9: ECT4 [11: Note ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) 7.8.2 DD1 (CCIR 656, SMPTE125M), I/O UAL 7.8.2.1 Cb-Y-Cr-Y 8-bit wide stream In this mode two video ports with YUV sampling scheme ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) 7.8.2.2 YUV 16-bit parallel (DMSD2) stream In this mode only the HPS data path is available since the BRS data path supports only 8-bit wide data streams. Colour difference ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) handbook, full pagewidth LLC PXQ_x D1_x ( PXQ_x D1_x ( Fig.10 Timing of PXQ_x for CCIR 656 at the D1_x port. Table 51 Video ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) Table 52 Protection bits BIT NUMBER FIXED ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) Table 53 Field interval definitions for D1 (CCIR 656) SAV and EAV codes; note 1 DEFINITION V-digital field blanking Field 1; start ( Field 1; finish (V ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) handbook, full pagewidth LLC HS VS FLD V-DMSD FLD-DMSD Fig.12 Timing of field detection ODD-to-EVEN for direct mode. 7.8.7 A CQUISITION CONTROL The processing window for the scaling unit ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) handbook, full pagewidth ( qualified lines, i.e. lines containing at least one qualified pixel. 7.8.8 C CCIR 656 OMPARISON BETWEEN This section describes how to choose the ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) Table 54 Offsets to CCIR 656 line 23 depending on PAL or NTSC source (in compliance with Recommendation 601), ODD and EVEN field and select mode (see note 1) ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) handbook, full pagewidth FID CCIR 656 VS CCIR 656 ODD SAA711x VS SAA711x LINES (1) 621 622 (2) (308) (309) (310) (1) The line numbers not in parenthesis refer ...
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Acrobat reader. white to force landscape pages to be ... Table 55 Comparison between CCIR 656 lines and the SLC (note 1) CCIR 656 ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) 7.8.8.2 Video with NTSC format handbook, full pagewidth FID CCIR 656 VS CCIR 656 ODD SAA711x VS SAA711x LINES (1) 523 524 525 (2) (260) (261) (262) (1) The ...
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Acrobat reader. white to force landscape pages to be ... Table 56 Comparison between CCIR 656 lines and SLC (note 1) CCIR 656 (525) ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) 7.9 High Performance Scaler (HPS) Depending on the selected port modes the incoming and scaled data are formatted/reformatted (8-bit or 16-bit), and the corresponding reference signals are generated. Based ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) The subsampler collects a number of [XPSC + 2 pixels to calculate a new subsampled output pixel downscale dependent FIR filter is built with ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) 18 handbook, full pagewidth 0.1 Fig.19 Chrominance Prefilter: frequency response for miscellaneous register settings. Table 57 Horizontal ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) HORIZONTAL XPSC PRESCALER SEQUENCE (EXAMPLE 1111 1 1 1111 9 1221 2 2 1221 1122 2 2 2211 1 9 1111 1111 10 1212 ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) 7.9.2.4 Vertical scaler The vertical scaler performs the vertical downscaling of the input data stream to a randomly number of output lines. It can be used for input line ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) Table 58 Vertical scaling and normalization VERTICAL COEFFICIENT SCALE YACL SEQUENCE (EXAMPLE) RATIO 1 1-1 (512) 1-2-1 ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) VERTICAL COEFFICIENT SCALE YACL SEQUENCE (EXAMPLE) RATIO 1111 1111 1 1 1111 1111 17 18 (964) 2212 2212 2 2 2122 2122 1222 2222 1 ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) 7.9.3 H ORIZONTAL PHASE SCALING In the phase correct Horizontal Phase Scaling (HPS) the pixels are calculated for the geometrically correct, orthogonal output pattern, down to pattern. A horizontal ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) handbook, full pagewidth 1 1/2 line dropping handbook, full pagewidth 1 line repetition 2004 Aug 25 D1 vertical downscaling 1/4 PCI (DMA3) Fig.22 BRS inbound mode. D1 vertical 4 ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) The PCI source data is defined by the base address (BaseOdd3 and BaseEven3), the distance between the start addresses of two consecutive lines of a field (Pitch3), the number ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) handbook, full pagewidth Fig.25 Reference signals for scaling window for direct and line memory mode. 7.10.2.2 Direct mode The timing reference signals (VS, HS, LLC and FID) are taken ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) handbook, full pagewidth Fig.26 Sync and data path for direct and line memory mode. 7.10.3 VBI DATA INTERFACE The SAA7146A transports VBI data (data during the Vertical Blanking Interval) ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) Table 59 RGB-32 format BIT 31 TO BIT Table 60 RGB-24 packed format BUS CYCLE BIT 31 TO BIT ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) Table 62 YUV format BIT 31 TO BIT Table 63 YUV format BUS CYCLE ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) 7.11.2 B INARY RATIO SCALER OUTPUT FORMATS All YUV formats are based on CCIR coding: Luminance Y in straight binary: Black 256 linear coding White: ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) Table 66 Initial setting of Dual D1 interface OFFSET NAME BIT (HEX) 50 LLC_A 31 SIO_A PVO_A 28 PHO_A 27 50 SYNC_A ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) OFFSET NAME BIT (HEX) 50 LLC_B 15 50 SIO_B 14 and 13 50 PVO_B 12 50 PHO_B 11 50 SYNC_B FIDESB 7 and 6 RW ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) 7.12.2 V IDEO DATA STREAM HANDLING AT PORT Table 67 Video data stream handling at port D1_A OFFSET NAME BIT (HEX) 54 VID_A 31 and 30 RW Y8C_A 29 ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) 7.12.4 BRS P R ROGRAMMING EGISTER The BRS programming has in principle three modes: 1. Inbound and downscaling: the binary ratio scaler input multiplexer selects data from the Dual ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) OFFSET NAME BIT (HEX) 58 BXO BRS_H Read mode 3 and 2 PCI format 1 and 0 2004 Aug 25 TYPE INBOUND RW ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) Table 70 Horizontal offset values for the field memory mode RATIO 7.12.5 HPS PROGRAMMING REGISTER Table 71 HPS control register OFFSET NAME BIT (HEX) 5C ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) 7.12.6 V ERTICAL AND HORIZONTAL SCALING Table 72 HPS, vertical scaling OFFSET NAME BIT (HEX) 60 YACM 31 YSCI YACL YPO 14 to ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) Table 73 HPS, vertical scale and gain OFFSET NAME BIT (HEX) 64 PFY PFUV DCGY CYA 15 ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) Table 75 Prefilter selection for colour difference signals UV PFY1 PFY0 ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) Table 79 HPS, horizontal prescaler OFFSET NAME BIT (HEX and 30 DCGX XPSC XACM 17 16 CXY 15 ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) Table 81 HPS, horizontal fine-scale OFFSET NAME BIT (HEX) 6C XIM XSCI HXO 7.12.7 BCS Table 82 BCS ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) Table 85 Chrominance saturation control 7.12.8 C HROMA KEY Table 86 Chroma key range OFFSET NAME BIT ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) Table 87 HPS output and formats OFFSET NAME BIT (HEX) 78 matrix 31 and and 28 outformat and and ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) Table 89 Clip control OFFSET NAME BIT 78H ClipCK 9 and 8 7 ClipMode RecInterl 3 2 ClipOut 1 and 0 7.13 Scaler ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) Table 90 UPLOAD handling for the scaler registers OFFSET REGISTER (HEX) Initial setting of Dual 50 D1 Interface Video DATA stream 54 handling at port D1_A Video DATA stream ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) 7.14 Clipping The SAA7146A supports clipping in the HPS data path. Clipping can be achieved with the chroma key information or with clip data information coming via master read ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) handbook, full pagewidth handbook, full pagewidth ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) The two lists, pixel list and line list, are interlocked in the 64 Dword memory. The pixel list is located at the even addresses, the line list at the ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) 7.15.4 F UNCTIONAL DESCRIPTION An immediate access cycle consists of one address phase and one data phase. A block transfer with address increment enabled consists of several consecutive address/data ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) 7.15.4.1 Target bus cycle in Intel mode The SAA7146A starts a target transfer cycle by placing the target address on the multiplexed address/data lines (AD15 to AD0). The Address ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) address phase handbook, full pagewidth t as AD(WR) AD(RD) SBHE ALE RDN WRN RDY Fig.31 Intel style block transfer without address increment. 7.15.4.2 Target bus cycle in Motorola mode ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) address phase handbook, full pagewidth t as AD(WR) address AD(RD) address RWN AS UDS LDS DTACK address phase handbook, full pagewidth t as AD(WR) address address AD(RD) RWN AS ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) Table 93 Timing parameters (t PCI SYMBOL PARAMETER t address set-up time as t address hold time ah t delay between de-asserting of RDN/WRN alh and ALE t address ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) 7.15.4.3 Transfer configuration When using ‘dumb’ targets (unable to handshake) or ‘slow’ targets (unable to pull DTACK_RDY immediately), the cycle length is adjusted by using a programmable cycle timer. ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) handbook, full pagewidth AD(WR) AD(RD) SBHE ALE RDN WRN CLK Fig.34 PCI clock related protocol scheme for non-increment Intel mode, no access stretching via RDY. handbook, full pagewidth address ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) Table 94 Overview of peak data rates for non-increment (burst) block transfer configurations at 33 MHz PCI clock PROTOCOL TIMEOUT MODE VALUE (2) Intel/Motorola 0 (2) Intel/Motorola 0 Intel/Motorola ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) 7.15.4.4 Command word description To configure and initiate a transfer there are 3 PCI memory mapped command words. A DEBI register upload after writing to DEBI_COMMAND starts the transfer ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) 7.16 Audio interface 7.16.1 G ENERAL DESCRIPTION The SAA7146A has two independent audio interface circuits (A1 and A2) for serial input and output of digital audio data streams. The ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) 7.16.3 A UDIO INTERFACE PINS There are 14 audio interface pins. SD0 is output only for A1 and input only for A2, SD4 is output only for A2 and ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) 7.16.4.1 Audio clock selection The clock divider circuit offers 16 different clock stages. To transform a reference clock of 24.576 MHz to a bit clock for an 8 kHz ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) 7.16.4.2 Audio data path Figure 39 illustrates the audio data path. An input multiplexer selects serial data from one of four SD pins. A1 can select SD0 and the ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) Table 100 Feedback buffers OFFSET NAME 144H FB_BUFFER1 148H FB_BUFFER2 Under control of the time slot list, a collected Dword is then stored ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) Each interface, A1 and A2, uses its own Time Slot List (TSL) when working independently of each other. The shaded areas are valid for combined processing of TSL1 and ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) Table 102Time slot list bit functions NAME WS0 defining pattern of word select signal output at WS0 pin; if WS0 pin is input and trigger, WS0 bit is meaningless ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) 7.16.5 A UDIO CONFIGURATION The configuration parameters are selected using two configuration registers, ACON1 and ACON2. The ACON1 register is locally buffered. The download from the shadow register into ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) 7.16.5.1 Audio mode control There are 3 audio mode bits to select which TSL is active and how to synchronize and combine them. The first half of Table 105 ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) 7.16.5.2 Audio input level monitoring The audio input level monitoring feature allows the control of audio input levels without additional external hardware, by comparing the absolute value of the ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) 7.16.5.4 Bit clock control Specific to each audio interface A2, is the programming of bit clock source. Table 109CLK source definition Ax_CLKSRC [4:0] (HEX ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) 2 7.17 I C-bus interface 7.17.1 G ENERAL DESCRIPTION 2 The I C-bus is a simple 2-wire bus for efficient inter-IC data exchange. Only two bus lines are required: ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) Table 110Status register (IICSTA); note 1 OFFSET NAME (HEX) 90 IICCC [2: ABORT 7 SPERR 6 APERR 5 DTERR 4 DRERR ERR 1 ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) Table 112 Transfer control register (IICTRF) OFFSET NAME (HEX) 8C BYTE2 BYTE1 BYTE0 ATTR2 [1:0] ATTR1 [1:0] ATTR0 [1:0] ERR BUSY Table 113 ATTRx1 and ATTRx0; attribute information for ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) 7.17.2.2 Example The protocol sequence for reading three bytes with subaddress access is illustrated in Fig.42. The procedure for this read operation is detailed below: 1. Address slave, write ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) handbook, halfpage handbook, halfpage Fig.44 Transfer data and write attribute information to IICTFR. 2004 Aug Fig.43 Address slave and write to IICTFR. D ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) 7.18 SAA7146A register tables Table 114 Registers and offsets sorted by functional groups OFFSET NAME (HEX) 00 BaseOdd1 04 BaseEven1 08 ProtAddr1 0C Pitch1 10 BasePage1 14 Num_Line_Byte1 18 ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) OFFSET NAME (HEX) 134 PCI_ADP3 138 PCI_ADP4 13C PCI_DDP FC MC1 100 MC2 104 RPS_ADDR0 108 RPS_ADDR1 C4 RPS_PAGE0 C8 RPS_PAGE1 CC RPS_THRESH0 D0 RPS_THRESH1 D4 RPS_TOV0 D8 RPS_TOV1 ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) OFFSET NAME (HEX) 88 DEBI_AD 7C DEBI_CONFIG 80 DEBI_COMMAND 84 DEBI_PAGE F4 ACON1 F8 ACON2 144 FB_BUFFER1 148 FB_BUFFER2 140 LEVEL_REP 180-1BC audio time slot registers 1 1C0-1FC audio ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) OFFSET NAME (HEX) 60 HPS, vertical scale 64 HPS, vertical scale and gain RW 68 HPS horizontal prescale 6C HPS horizontal fine-scale 70 BCS control 74 chroma key range ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) OFFSET NAME (HEX) FC MC1 100 MC2 104 RPS_ADDR0 108 RPS_ADDR1 10C ISR 110 PSR 114 SSR 118 EC1R 11C EC2R 120 PCI_VDP1 124 PCI_VDP2 128 PCI_VDP3 12C PCI_ADP1 ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) Table 116 BST instructions supported by the SAA7146A INSTRUCTION BYPASS this mandatory instruction provides a minimum length serial path (1-bit) between TDI and TDO when no test operation of ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) 9 LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134); all ground pins connected together and grounded (0 V); all supply pins connected together. SYMBOL PARAMETER ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) SYMBOL PARAMETER V HIGH-level output voltage C-bus, pins SDA and SCL V LOW-level input voltage IL (V related input levels) DDI2C V HIGH-level input voltage IH ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) SYMBOL PARAMETER t propagation delay from positive pd edge of LLC_A, LLC_B PCI I/O signals DC SPECIFICATION V HIGH-level input voltage IH V LOW-level input voltage IL I HIGH-level ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) SYMBOL PARAMETER t active to float delay off t input set-up time to CLK su (bussed signal) t input set-up time to CLK su(ptp) (point-to-point) t input hold time ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) handbook, full pagewidth clock input LCC_(A, B) data and control inputs input PXQ_(A, B) data and control outputs clock output LLC_(A, B) 2004 Aug 25 t LLC t LLCH ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) handbook, full pagewidth CLK OUTPUT DELAY 3-STATE OUTPUT INPUT 2004 Aug 25 1 val 1 off 1.5 V input ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) 12 APPLICATION EXAMPLE handbook, full pagewidth analog audio SAA7360/66 antenna PHILIPS TUNER analog video NTSC, PAL 2004 Aug YUV C-bus SAA7111A ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) 13 PACKAGE OUTLINE QFP160: plastic quad flat package; 160 leads (lead length 1.6 mm); body 3.4 mm; high stand-off height y 120 121 pin 1 ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) 14 SOLDERING 14.1 Introduction to soldering surface mount packages This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) 14.5 Suitability of surface mount IC packages for wave and reflow soldering methods PACKAGE (3) BGA, HTSSON..T , LBGA, LFBGA, SQFP, SSOP..T VFBGA, XSON DHVQFN, HBCC, HBGA, HLQFP, HSO, ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI) 15 DATA SHEET STATUS DATA SHEET PRODUCT LEVEL (1) STATUS STATUS I Objective data Development II Preliminary data Qualification III Product data Production Notes 1. Please consult the most ...
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Philips Semiconductors Multimedia bridge, high performance Scaler and PCI circuit (SPCI PURCHASE OF PHILIPS I Purchase of Philips I components in the I Philips. This specification can be ordered using the code 9398 393 40011. 2004 Aug 25 ...
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Philips Semiconductors – a worldwide company Contact information For additional information please visit http://www.semiconductors.philips.com. For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com. © Koninklijke Philips Electronics N.V. 2004 All rights are reserved. Reproduction in whole or in part is prohibited ...