SAA7146AH NXP Semiconductors, SAA7146AH Datasheet - Page 87

SAA7146AH

Manufacturer Part Number
SAA7146AH
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of SAA7146AH

Lead Free Status / Rohs Status
Compliant

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Philips Semiconductors
Table 79 HPS, horizontal prescaler
Table 80 Selection of output gain
2004 Aug 25
68
0
0
0
0
1
1
1
1
OFFSET
Multimedia bridge, high performance
Scaler and PCI circuit (SPCI)
(HEX)
DCGX2
DCGX
XPSC
XACM
CXY
CXUV
NAME
31 and 30
29 to 27
26 to 24
23 to 18
17
16
15 to 8
7 to 0
0
0
1
1
0
0
1
1
BIT
RW
RW
RW
RW
RW
DCGX1
TYPE
reserved
DC gain control of X prescaler (see Table 57): depending on the
number of active coefficients ‘2’ in the accumulation sequence and
the sequence length, the output amplitude gain has to be set to as
given in Table 80.
reserved
prescaling factor of the X PreSCaler: defines accumulation
sequence length and subsampling factor of the input data stream:
XPSC = TRUNC (N
X (horizontal) prescaler Accumulation Mode of accumulating
FIR:
reserved
Coefficient select for X prescaler (luminance component Y):
for DC gain compensation of prescaler the accumulated pixels can
be weighted by ‘1’ or ‘2’. CXYi defines a sequence of 8 bits, which
control the coefficients:
Coefficient select for X prescaler (colour difference signals
UV): for DC gain compensation of prescaler the accumulated
pixels can be weighted by ‘1’ or ‘2’. CXUVi defines a sequence of
8 bits, which control the coefficients:
N
N
0: accumulating operates overlapping
1: non overlapping accumulation (must be set to bypass the
prescaler).
CXYi = 0: pixel weighted by ‘1’
CXYi = 1: pixel weighted by ‘2’
CXUVi = 0: pixel weighted by ‘1’
CXUVi = 1: pixel weighted by ‘2’
OP
IP
= number of qualified scaler input pixel.
87
= number of prescaler output pixel
0
1
0
1
0
1
0
1
DCGX0
IP
/N
OP
DESCRIPTION
1)
1
1
1
1
1
1
1
1
2
4
8
2
4
8
16
Product specification
SAA7146A
GAIN

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