SAA7146AH NXP Semiconductors, SAA7146AH Datasheet - Page 82

• Manufacturer Part Number: SAA7146AH
• Manufacturer: NXP Semiconductors

Specifications of SAA7146AH

• Lead Free Status / Rohs Status: Compliant

Philips Semiconductors
2004 Aug 25
58
OFFSET
Multimedia bridge, high performance
Scaler and PCI circuit (SPCI)
(HEX)
BXO
BRS_H
Read mode
PCI format
NAME
16 to 7
6 to 4
3 and 2
1 and 0
BIT
RW
RW
RW
RW
TYPE
horizontal offset, counted in
qualified LLC cycles, after
selected horizontal sync edge, till
data is captured from DD1
horizontal downscaling
(see Section 7.10.1):
reserved
output format PCI side:
000: every pixel is captured
001: every 2nd pixel is captured
010: reserved
011: every 4th pixel is captured
100: reserved
101: reserved
110: reserved
111: every 8th pixel is captured
00: YUV 4 : 2 : 2
01: Y8, only luminance
10: Y2, 2 MSBs of Y only
11: Y1, 1 MSB of Y only
82
INBOUND
DESCRIPTION
BXO defines a horizontal offset,
counted in LLC cycles, after
selected horizontal sync edge till
data is read from the FIFO
in field memory mode the
following offsets depending on the
horizontal scaling ratio must be
selected to guarantee the correct
outrun behaviour of the scaler
(see Table 70). The video window
is select by ‘NumLines’,
‘NumBytes’, ‘pitch’ and ‘base
address’
horizontal upscaling:
input format PCI side:
000: provide every sample once
001: provide every sample
twice
010: reserved
011: provide every sample
4 times
100: reserved
101: reserved
110: reserved
111: provide every sample
8 times
00: line memory mode
01: field memory mode
10: direct mode with pixel
repetition for not qualified bytes.
11: direct with grey pixel (10H
for luminance and 80H for
chrominance values) for not
qualified bytes.
00: YUV 4 : 2 : 2
01: reserved
10: reserved
11: reserved
OUTBOUND
Product specification
SAA7146A