SC16C652BIB48,151 NXP Semiconductors, SC16C652BIB48,151 Datasheet - Page 13

IC UART DUAL W/FIFO 48-LQFP

SC16C652BIB48,151

Manufacturer Part Number
SC16C652BIB48,151
Description
IC UART DUAL W/FIFO 48-LQFP
Manufacturer
NXP Semiconductors
Type
IrDAr
Datasheet

Specifications of SC16C652BIB48,151

Number Of Channels
2, DUART
Package / Case
48-LQFP
Features
2 Channels
Fifo's
32 Byte
Voltage - Supply
2.5V, 3.3V, 5V
With Auto Flow Control
Yes
With Irda Encoder/decoder
Yes
With False Start Bit Detection
Yes
With Modem Control
Yes
With Cmos
Yes
Mounting Type
Surface Mount
Data Rate
5 Mbps
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.25 V
Supply Current
4.5 mA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Operating Supply Voltage
2.5 V or 3.3 V or 5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-3276
935274409151
SC16C652BIB48-S

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SC16C652BIB48,151
Manufacturer:
NXP Semiconductors
Quantity:
10 000
Philips Semiconductors
SC16C652B_4
Product data sheet
Fig 5. Internal loop-back mode diagram
RXRDYA, RXRDYB
TXRDYA, TXRDYB
INTA, INTB
D0 to D7
A0 to A2
RESET
CSA
CSB
IOW
IOR
MCR[2] (OP1). Loop-back test data is entered into the transmit holding register via the
user data bus interface, D[7:0]. The transmit UART serializes the data and passes the
serial data to the receive UART via the internal loop-back connection. The receive UART
converts the serial data back into parallel data that is then made available at the user data
interface D[7:0]. The user optionally compares the received data to the initial transmitted
data for verifying error-free operation of the UART TX/RX circuits.
In this mode, the receiver and transmitter interrupts are fully operational. The modem
control interrupts are also operational.
SC16C652B
INTERRUPT
REGISTER
CONTROL
CONTROL
DATA BUS
SELECT
LOGIC
LOGIC
LOGIC
AND
Rev. 04 — 1 September 2005
Dual UART with 32-byte FIFOs and IrDA encoder/decoder
XTAL1
GENERATOR
REGISTERS
REGISTERS
CLOCK AND
BAUD RATE
TRANSMIT
CONTROL
CONTROL
RECEIVE
LOGIC
LOGIC
FLOW
FLOW
FIFO
FIFO
XTAL2
TRANSMIT
REGISTER
REGISTER
RECEIVE
CONTROL
SHIFT
SHIFT
MODEM
LOGIC
ENCODER
DECODER
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
IR
IR
SC16C652B
002aaa594
TXA, TXB
RXA, RXB
RTSA, RTSB
CTSA, CTSB
DTRA, DTRB
DSRA, DSRB
(OP1A, OP1B)
RIA, RIB
(OP2A, OP2B)
CDA, CDB
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