SC16C652BIB48,151 NXP Semiconductors, SC16C652BIB48,151 Datasheet - Page 14

• Manufacturer Part Number: SC16C652BIB48,151
• Description: IC UART DUAL W/FIFO 48-LQFP
• Manufacturer: NXP Semiconductors
• Type: IrDAr

Specifications of SC16C652BIB48,151

• Number Of Channels: 2, DUART
• Package / Case: 48-LQFP
• Features: 2 Channels
• Fifo's: 32 Byte
• Voltage - Supply: 2.5V, 3.3V, 5V
• With Auto Flow Control: Yes
• With Irda Encoder/decoder: Yes
• With False Start Bit Detection: Yes
• With Modem Control: Yes
• With Cmos: Yes
• Mounting Type: Surface Mount
• Data Rate: 5 Mbps
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.25 V
• Supply Current: 4.5 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 2.5 V or 3.3 V or 5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 568-3276; 935274409151; SC16C652BIB48-S

Philips Semiconductors
SC16C652B_4
Product data sheet
6.11 Sleep mode
Sleep mode is an enhanced feature of the SC16C652B UART. It is enabled when EFR[4],
the enhanced functions bit, is set and when IER[4] of both channels are set. Sleep mode
is entered when:
Remark: Sleep mode will not be entered if there is data in the RX FIFO.
In Sleep mode, the UART clock and baud rate clock are stopped. Since most registers are
clocked using these clocks, the power consumption is greatly reduced.
Remark: Writing to the divisor latches, DLL and DLH, to set the baud clock, must not be
done during Sleep mode. Therefore, it is advisable to disable Sleep mode using IER[4]
before writing to DLL or DLH.
SC16C652B resumes normal operation by any of the following:
If the device is awakened by one of the conditions described above, it will return to the
Sleep mode automatically after the last character is transmitted or read by the user. The
device will stay in Sleep mode until it is disabled by setting any channel’s IER bit 4 to a
logic 0.
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Modem input pins are not toggling.
The serial data input line, RX, is idle (logic HIGH).
The TX FIFO and TX shift register are empty.
There are no interrupts pending.
Receives a start bit on RXA/RXB pin.
Data is loaded into transmit FIFO.
A change of state on any of the modem input pins
Rev. 04 — 1 September 2005
Dual UART with 32-byte FIFOs and IrDA encoder/decoder
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
SC16C652B
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