AT32UC3A3128 Atmel Corporation, AT32UC3A3128 Datasheet - Page 379

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AT32UC3A3128

Manufacturer Part Number
AT32UC3A3128
Description
Manufacturer
Atmel Corporation

Specifications of AT32UC3A3128

Flash (kbytes)
128 Kbytes
Pin Count
144
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
110
Ext Interrupts
110
Usb Transceiver
1
Usb Speed
Hi-Speed
Usb Interface
Device + OTG
Spi
6
Twi (i2c)
2
Uart
4
Lin
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
16
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
128
Self Program Memory
YES
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6
Operating Voltage (vcc)
3.0 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
18
Input Capture Channels
12
Pwm Channels
12
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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19.13 Module Configuration
32072G–11/2011
The following table defines the valid settings for the DEST_PER and SRC_PER fields in the
CFGxH register. The direction is specified as observed from the DMACA. So for instance, AES -
RX means this hardware handshaking interface is connected to the input of the AES modulel
Table 19-6.
.
Table 19-7.
PER Value
0
1
2
3
4
5
6
7
Handshaking
Interface
DMACA - EXT0
DMACA - EXT1
DMACA Handshake Interfaces
DMACA External Handshake Signals
Hardware Handshaking Interface
AES - RX
AES - TX
MCI - RX
MCI -TX
MSI - RX
MSI - TX
DMACA - EXT0
DMACA - EXT1
Function
DMA Acknowledge (DMACK0)
DMA Request (nDMAREQ0)
DMA Acknowledge (DMACK1)
DMA Request (nDMAREQ1)
Signal Name
DMAACK[0]
DMARQ[0]
DMAACK[1]
DMARQ[1]
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