AT32UC3A3128 Atmel Corporation, AT32UC3A3128 Datasheet - Page 552

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AT32UC3A3128

Manufacturer Part Number
AT32UC3A3128
Description
Manufacturer
Atmel Corporation

Specifications of AT32UC3A3128

Flash (kbytes)
128 Kbytes
Pin Count
144
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
110
Ext Interrupts
110
Usb Transceiver
1
Usb Speed
Hi-Speed
Usb Interface
Device + OTG
Spi
6
Twi (i2c)
2
Uart
4
Lin
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
16
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
128
Self Program Memory
YES
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6
Operating Voltage (vcc)
3.0 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
18
Input Capture Channels
12
Pwm Channels
12
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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11
Table 25-5.
Table 25-6.
25.6.2
32072G–11/2011
FI field
Fi (decimal
Di=16
Di=32
Di=12
Di=20
Di=2
Di=4
Di=8
Fi
Receiver and Transmitter Control
23.25
11.62
46.5
18.6
Binary and Decimal Values for Fi
Possible Values for the Fi/Di Ratio
372
186
0000
93
31
372
0001
139.5
69.75
34.87
17.43
372
46.5
27.9
558
279
Fi is a binary value encoded on a 4-bit field, named FI, as represented in
Table 25-6
baud rate clock.
If the USART is configured to run in ISO7816 mode, the clock selected by the MR.USCLKS field
is first divided by the CD value before it can be output on the CLK pin, to feed the smart card
clock inputs, by writing a one to the Clock Output Select bit (MR.CLK0). It is then divided by the
FI Over DI Ratio Value field in the FI DI Ratio Register (FIDI.FI_DI_RATIO), which can be up to
2047 in ISO7816 mode. This will be rounded off to an integral so the user has to select a
FI_DI_RATIO value that comes as close as possible to the expected Fi/Di ratio. The
FI_DI_RATIO reset value is 0x174 (372 in decimal) and is the most common divider between the
ISO7816 clock and bit rate (Fi=372, Di=1).
mentary Time Unit (ETU), corresponding to a bit period, and the ISO 7816 clock.
Figure 25-4. Elementary Time Unit (ETU)
After a reset, the transceiver is disabled. The receiver/transmitter is enabled by writing a one to
either the Receiver Enable, or Transmitter Enable bit in the Control Register (CR.RXEN, or
CR.TXEN). They may be enabled together and can be configured both before and after they
have been enabled. The user can reset the USART receiver/transmitter at any time by writing a
one to either the Reset Receiver (CR.RSTRX), or Reset Transmitter (CR.RSTTX) bit. This soft-
ware reset clears status bits and resets internal state machines, immediately halting any
communication. The user interface configuration registers will retain their values.
ISO7816 I/O Line
0010
558
ISO7816 Clock
23.25
46.5
37.2
744
372
186
93
62
shows the resulting Fi/Di ratio, which is the ratio between the ISO7816 clock and the
on TXD
on CLK
0011
744
139.5
69.75
34.87
1116
55.8
558
279
93
0100
1116
1488
46.5
74.4
744
372
186
124
93
0101
1488
232.5
116.2
58.13
1860
930
465
155
93
Figure 25-4
0110
1860
ISO7816 Clock Cycles
42.66
25.6
512
256
128
64
32
16
FI_DI_RATIO
1001
512
1 ETU
shows the relationship between the Ele-
38.4
768
384
192
96
48
24
64
1010
768
85.33
1024
51.2
512
256
128
64
32
1024
1011
Table
1536
76.8
25-5.
768
384
192
128
1536
1100
96
48
170.6
102.4
2048
2048
1024
1101
512
256
128
64
552

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